Fujitsu Corporation

Miki Tanaka

Hideaki Isogai

Kazuo Ooami

A method for controlling the readout or write-in of a semiconductor memory device, and an apparatus for the same. During the selection of memory cells in a memory cell array to readout or write in data, the steps of selecting the memory cells of a specific address in the memory cell array include accessing the memory cells of the specific address and then and only then accessing the memory cells of the designated address corresponding to address signals input from the outside.

Method for controlling read-out or write in of semiconductor memory

A decoder circuit comprises a differential amplifier circuit which receives one or a plurality of line selection signals which are to be decoded, switching circuits for switching predetermined lines to in high or low level states according to the output signal supplied from the differential amplifier circuit, and constant current supplying circuits for supplying constant current to the predetermined lines according to the signal supplied from the switching circuits. The switching circuits are connected in parallel with respect to the constant current supplying circuits.

Growing community of inventors

Kawasaki, Japan

Miki Tanaka