Matsushita Electric Industrial Co., Ltd.

Miki Arita

Masayoshi Tojima

Masahiro Ohashi

Yuji Sugisawa

Shunichi Kurohmaru

Mana Hamada

Shunichi Kuromaru

Yasuo Kohashi

Tomonori Yonezawa

Toshihiro Moriiwa

Hiromasa Nakajima

A motion vector detection apparatus for detecting a motion vector by performing block matching between a target block including a plurality of pixels in a current image, and a reference block including a plurality of pixels in a predetermined reference area in a past image that is previous to the current image, the apparatus including a first address generator for generating addresses of data in the target block and addresses of data in the reference area; a first storage unit for holding data of the reference area designated by the first address generator; a second storage unit for holding data of the target block designated by the first address generator; a second address generator for generating addresses of data to be outputted from the first storage unit and the second storage unit; and a motion vector detector for detecting a motion vector by using the data outputted from the first storage unit and the data outputted from the second storage unit; wherein the motion vector detector subtracts the absolute values of differences in pixel data between the reference block and the target block, one by one, from a threshold value, and when the result of subtraction becomes negative, the motion vector detector stops calculation of the sum of absolute differences in the corresponding position.

Motion vector detection apparatus for performing checker-pattern subsampling with respect to pixel arrays

A system which allows signal transmission between circuit blocks is constructed promptly by automatically generating an I/F circuit in response to the adjustment of a timing relationship and to a modification in a waveform on a GUI and automatically inserting the I/F circuit between the circuit blocks or adding the I/F circuit to any of the circuit block. A circuit for outputting an operation enable for a receiving side is generated automatically between a plurality of blocks operating with different frequencies, whereby the use of the circuit blocks is expanded in spite of the different frequencies. Further, the design of a large-scale system is performed efficiently by automatically generating a desired waveform by a simple editing operation, generating a desired signal waveform by forming a combinational circuit of signals in the circuit block, and automatically generating a logic synthesis script.

Method of designing semiconductor integrated circuit device

A motion vector detection apparatus for detecting a motion vector by performing block matching between a target block including a plurality of pixels in a current image, and a reference block including a plurality of pixels in a predetermined reference area in a past image, the apparatus including a first address generator for generating addresses of data in the target block and addresses of data in the reference area; a first storage unit for holding data of the reference area designated by the first address generator; a second storage unit for holding data of the target block designated by the first address generator; a second address generator for generating addresses of data to be outputted from the first storage unit and the second storage unit; and a motion vector detector for detecting a motion vector by using the data outputted from the first storage unit and the data outputted from the second storage unit. The second address generator is for performing subsampling on the addresses of the data to be outputted from the first storage unit and the second storage unit so that the addresses are sampled in a checker pattern with respect to pixel arrays corresponding to images of the reference block and the target block. Therefore, the amount of data to be processed is reduced, resulting in increased processing speed and reduced power consumption.

Motor vector detection apparatus for performing checker-pattern subsampling with respect to pixel arrays

Apparatus and method for data transmission while performing encoding processing on a non-limited moving vector mode, which avoids an increase in required memory capacity and a reduction in processing load, the apparatus comprising a two dimensional address generating unit for generating an access address of an external memory and an address control unit for administrating the horizontal position and the vertical position of the extended logical space and generating an operation authorizing signal for the two dimensional address generating unit, and the two dimensional address generating unit and the address control unit are operated in relation to each other so that an access address to outside the effective video data region is controlled to be an address of a pixel data at the periphery of the effective video data region, thereby reducing the extended region in the external memory.

Video processing apparatus for performing address generation and control, and method therefor

A system which allows signal transmission between circuit locks is constructed promptly by automatically generating an I/F circuit in response to the adjustment of a timing relationship and to a modification in a waveform on a GUI and automatically inserting the I/F circuit between the circuit blocks or adding the I/F circuit to any of the circuit block. A circuit for outputting an operation enable for a receiving side is generated automatically between a plurality of blocks operating with different frequencies, whereby the use of the circuit blocks is expanded in spite of the different frequencies. Further, the design of a large-scale system is performed efficiently by automatically generating a desired waveform by a simple editing operation, generating a desired signal waveform by forming a combinational circuit of signals in the circuit block, and automatically generating a logic synthesis script.

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Iizuka, Japan

Miki Arita