Texas Instruments Corporation

Mikel K Ash

Krishnaswamy Nagaraj

Joonsung Park

Paul Kimelman

Xiao Pu

Steve Tuyen Vu

A temperature sensor uses a semiconductor device that has a known voltage drop characteristic that is proportional to absolute temperature (PTAT). A controllable current source is coupled to the semiconductor device and is operable to sequentially inject a bias current having a value I(bias) and fixed ratio N of I(bias) into the semiconductor device. A delta sigma analog to digital converter (ADC) has an input coupled to the semiconductor device. The delta sigma ADC is configured to sample and integrate a sequence of voltages pairs produced across the semiconductor device by repeatedly injecting an ordered sequence of selected bias currents into the semiconductor device. The ordered sequence of selected bias currents comprises M repetitions of (N&#xd7;I(bias); I(bias)) and one repetition of (M&#xd7;I(bias); M&#xd7;N&#xd7;I(bias)).

Resistance and offset cancellation in a remote-junction temperature sensor

Methods and circuits for measuring the temperature of a transistor are disclosed. An embodiment of the method includes, providing a current into a circuit, wherein the circuit is connected to the transistor. A variable resistance is connected between the base and collector of the transistor. The circuit has a first mode and a second mode, wherein the current in the first mode flows into the base of the transistor and through the resistance and the current in the second mode flows into the emitter of the transistor. Voltages in both the first mode and the second mode are measured using different resistance settings. The temperature of the transistor is calculated based on the difference between the different voltages.

Circuits and methods for determining the temperature of a transistor

An enhanced resolution successive-approximation register (SAR) analog-to-digital converter (ADC) is provided that includes a digital-to-analog converter (DAC), a comparator and enhanced resolution SAR control logic. The DAC includes analog circuitry that is configured to convert an M-bit digital input to an analog output. The comparator includes a plurality of coupling capacitors. The enhanced resolution SAR control logic is configured to generate an M-bit approximation of an input voltage and to store a residue voltage in at least one of the coupling capacitors. The residue voltage represents a difference between the input voltage and the M-bit approximation of the input voltage. The enhanced resolution SAR control logic is further configured to generate an N-bit approximation of the input voltage based on the stored residue voltage, where N&#x3e;M.

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Cedar Park, TX, United States of America

Mikel K Ash