Cisco Technology, Inc.

Mike Sapozhnikov

Joel Richard Goergen

Amendra Koul

David Nozadze

Yaochao Yang

Kartheek Nalla

Upendranadh Reddy Kareti

Tomer Osi

Sayed Ashraf Mamun

George Edward Curtis

Arnav Shailesh Shah

Amrik Singh Bains

Peter Gunadisastra

Ken Naumann

Jason Visneski

Xing Wang

Xiaohong Wu

An apparatus includes a printed circuit board (PCB), and an integrated circuit (IC) package connected with the PCB. The IC package includes a package substrate, a die secured to the package substrate and including an integrated circuit, and a stiffener ring secured to the package substrate and surrounding so as to define a perimeter around the die. The stiffener ring increases a rigidity of the package substrate and delivers electrical power to the integrated circuit, where the stiffener ring includes a first conductive layer forming a power (PWR) plane for the integrated circuit, a second conductive layer forming a ground (GND) plane for the integrated circuit, and an insulating layer disposed between the first conductive layer and the second conductive layer.

Stiffener ring combined with ASIC power delivery

Channel predictive behavior and fault analysis may be provided. A forward time value may be determined comprising a time a forward signal takes to travel from a transmitter over a channel to the receiver. Next, a reflected time value may be determined comprising a time a reflected signal takes to travel to the receiver. The reflected signal may be associated with the forward signal. A discontinuity may then be determined to exist on the channel based on the forward time value and the reflected time value. The reflected signal may be caused by the discontinuity and a high impedance or low impedance at the transmitter present after the forward signal is sent.

Channel predictive behavior and fault analysis

An apparatus includes an integrated circuit package and a heatsink. The integrated circuit package includes a substrate, an integrated circuit, a first plurality of signal conductors, and a second plurality of signal conductors. The substrate includes a first surface and a second surface opposite the first surface. The integrated circuit is coupled to the first surface of the substrate. The first plurality of signal conductors are arranged along a periphery of the first surface of the substrate. The second plurality of signal conductors are arranged along a periphery of the second surface of the substrate. The heatsink includes a first portion positioned along the first surface of the substrate and a second portion positioned along the second surface of the substrate.

Integrated circuit package with heatsink

A method is provided that includes inspecting a layer of a printed circuit board through an inspection window comprising an opening formed in one or more other layers of the printed circuit board and identifying a location of a trace aligned with the inspection window, relative to a marker in a fiber bundle of a fiber weave to assess fiber weave skew.

Fiber weave skew assessment for printed circuit boards

Certain aspects of the present disclosure provide techniques for pinless interconnect for twinaxial cables to an IC. This includes a socket coupled to an integrated circuit (IC), a port structure coupled to the socket, and a ground connector inserted into the port structure. It further includes a twinaxial cable including a pair of conductors inserted through the ground connector to establish an electrical connection between the twinaxial cable and the IC.

Twinaxial cable port structure coupled to an integrated circuit socket

In one embodiment, a method includes inspecting a fiber weave for use in a printed circuit board with an automated optical inspection tool and identifying a distance between fiber bundles in the fiber weave. The fiber weave comprises a plurality of the fiber bundles woven to form the fiber weave and a portion of the fiber bundles comprise markers and identifying a distance between the fiber bundles in the fiber weave comprises measuring a distance between the markers.

An apparatus includes a printed circuit board (PCB). The PCB includes a plurality of through-holes extending through the PCB between a PCB first surface and a PCB second surface that opposes the PCB first surface, where each through-hole includes a via extending from the PCB first surface to a depth within the through-hole that is distanced from the PCB second surface. An integrated circuit surface mount is connected at the PCB first surface with vias of the through-holes, and a cable interconnect assembly is surface mount connected at the PCB second surface. The cable interconnect assembly includes a plurality of contact pins, each contact pin extending within a corresponding through-hole and having a sufficient dimension to engage and electrically connect with the via of the corresponding through-hole so as to facilitate exchange of an electrical signal between the integrated circuit and the cable interconnect assembly.

High speed traceless interconnect

A printed circuit board (PCB) includes a plurality of layers disposed at different depths of the PCB, circuit components disposed at different layers of the PCB, and a plurality of temperature measurement sensors located at one or more layers of the PCB, where each temperature measurement sensor is associated with a corresponding circuit component. A measured temperature is obtained at an embedded temperature measurement sensor located at an embedded layer within the PCB, and the measured temperature is correlated with an electrical property of an embedded circuit component located at the same embedded layer within the PCB as the embedded temperature measurement sensor. A plurality of moisture measurement sensors can also be located at one or more layers of the PCB to facilitate a measured moisture with an electrical property of an embedded circuit component.

Optimizing design and performance for printed circuit boards

In one embodiment, a method includes inspecting a layer of a printed circuit board through an inspection window comprising an opening formed in one or more other layers of the printed circuit board and identifying a location of a trace aligned with the inspection window, relative to a marker in a fiber bundle of a fiber weave to assess fiber weave skew.

In one embodiment, a transmission system includes a transmitter, a receiver, and a filter operable at one of the transmitter and the receiver to remove channel impairments. The filter is operable according to a sum of a Gaussian function and a reciprocal of cosine function, wherein the Gaussian and reciprocal of cosine functions comprise tunable parameters to account for skew and channel asymmetry.

Removal of channel impairments due to skew and channel asymmetry with a composite filter

In one embodiment, a method generally comprises importing a layout identifying routing information for a plurality of differential pair traces on a printed circuit board at a skew assessment module, receiving values for a plurality of skew parameters associated with fiber weave skew, receiving variation parameters from a database comprising data collected on fiber weave variation for one or more of the skew parameters, calculating a skew estimate for the printed circuit board based on the skew parameters and the variation parameters at the skew assessment module, and determining if the skew estimate is within a specified skew allowance for the printed circuit board.

In one embodiment, an apparatus includes a printed circuit board, a via-stub resonator formed in the printed circuit board, a plurality of vias surrounding the via-stub resonator, and a microstrip connected to the via-stub resonator for use in measuring an insertion loss to provide a resonance frequency. The via-stub resonator is designed to reproduce a dielectric constant value of a known material in a simulation. A via dielectric constant in an x and y plane is calculated based on the resonance frequency. A method for measuring the via dielectric constant using the via-stub resonator is also disclosed herein.

Measuring effective dielectric constant using via-stub resonance

A network connector assembly with an upper board member includes one or more upper coupling pins and a lower board member includes one or more lower coupling pins. The upper board member and lower board member each a plurality of sets of contact pins disposed on a respective top surface. A housing can be disposable over the upper board member and the lower board member forming one or more network couplers. Each of the one or more network couplers configured to receive one set of contact pins.

Growing community of inventors

San Jose, CA, United States of America

Mike Sapozhnikov