Avago Technologies International Sales Pte. Limited

Mike Rolfe Ferrara

Ryan E Hirth

Amiad Dvir

Mario Caresosa

Assaf Naor

Vitaly Zborovski

In some aspects, the disclosure is directed to methods and systems for controlling periodic jitter arising from a phase interpolator (PI). A receiver can receive incoming data. A fractional-N phase-locked loop (PLL) can receive a reference clock. Measurement circuitry can measure a parts per million (PPM) offset between the incoming data and the reference clock, of a PI. The fractional-N PLL can restrict jitter arising from the PI, to frequencies within a predefined bandwidth, by tuning a center frequency of the fractional-N PLL to reduce the PPM offset of the PI.

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Petaluma, CA, United States of America

Mike Rolfe Ferrara