Cirrus Logic Inc.

Mike Machado

Petro Estakhri

Paul M Romano

Larry D King

Son H Ho

Phuc Tran

Maryam Imam

A burst magnitude comparator and an instruction sequencer are employed in a servo system controller to rapidly determine position correction information for moving a transducer head over the center line of a track recorded on a disk in a mass storage disk drive. The burst magnitude comparator selects at least two burst signals derived from bursts recorded at predetermined locations relative to the center line from which to derive a correction control signal, based on a predetermined relationship of the burst signals, and supplies the selected burst signals in a predetermined order to facilitate calculation of the correction signal by a data processor used with the servo system controller. An instruction sequencer controls a sequence of converting the analog burst signals from the head to digital burst signals without intervention or control from the data processor. By ordering the signals with the burst magnitude comparator and by sequencing the conversion of the signals, the calculation is speeded and the processing and code requirements for the data processor are greatly reduced, thereby reducing transport delay and freeing the resources of the processor for use in other, potentially more important tasks associated with the servo controller.

Burst comparison and sequential technique for determining servo control

A servo system controller for a disk drive device which includes a rotating mass storage disk incorporates a timing error determining circuit for determining rotational speed variations in the disk from information contained in a servo field recorded in a track. A timing error signal is supplied when the speed variation exceeds a threshold, thus indicating an unacceptable level of speed variation. A digital synchronizer responds to asynchronous servo data signals from the disk to establish a cell clock signal occurring about a normal frequency, a cell during which only one servo data signal will occur, and a cell data signal which occurs during the cell. The cell clock signal clocks logical operations on a synchronous basis, and servo data signals are reliably captured. A concurrence determining circuit determines the degree of concurrence between the predetermined series of cell data signals and an actual pattern of signals derived from the servo field, and recognizes the servo control information from less than complete concurrence of the derived pattern and the actual expected pattern. Normal operation is permitted even through slight inconsistences may be detected, improving data throughput while still achieving an adequate level of error tolerance.

Sequence, timing and synchronization technique for servo system

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Boulder, CO, United States of America

Mike Machado