Hitachi, Ltd.

Mihoko Hashiba

Katsuyoshi Kitai

Tadaaki Isobe

Shigeko Yazawa

A store control method for a computer system having a storage with independently accessible plural store banks, plural access request controllers for issuing access requests to the storage, and a store controller for transmitting the access requests to each store bank. The store controller has an access request priority determining circuit of plural stages for selecting the access requests in the order of higher priority for each store bank so as to determine the order of priority between the access requests in multiple stages on the basis of the access requests. Further, plural priority control circuits of each stage are provided for stepwise performing control of priority of the main store access requests issued by the vector data processor for each of the store banks. Access is made to the main storage by assuring the order between the vector elements constituting vector data by allowing each first priority control circuit to send the access requests to the priority control circuit of next stage. Furthermore, the priority control circuit of the n-th stage sends the access request from the plural priority control circuits of the (n-1)th stage while assuring the order of the priority control circuits of the (n- 1)th stage.

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Hadano, Japan

Mihoko Hashiba