Nec Corporation

Miho Taniguchi

Isao Hasegawa

In a memory access control device for use in combination with request sources (A, B, C), a main memory (11), and an expanded memory (12), a request receiving port section (13) successively receives a plurality of input requests as received requests. Supplied with the received requests, a selecting circuit (14) selects one of the received requests as a selected request. Supplied with the selected request, a request judging circuit (15) judges a type of the selected request to produce a request type signal indicative of the type of the selected request. Responsive to the request type signal, a request processing section (16) processes the selected request. The input requests include an access request indicative of access to the main memory, a first data transfer request indicative of transfer of data from the main memory to the expanded memory, and a second data transfer request indicative of transfer of data from the expanded memory to the main memory. The input requests may include a diagnostic request indicative of detection of failure in the main memory.

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Tokyo, Japan

Miho Taniguchi