Lg Display Co., Ltd.

MiHee Shin

ChungSik Kong

Mingyeong Kim

SeWan Lee

HongGyu Han

Hun Jeoung

Juhnsuk Yoo

Seongsu Kim

Jaesung Yu

Taesang Kim

YoungJoo Kim

Jungsoo Park

Soonsung Ahn

Gyutae Kang

A display panel includes pixels connected to gate lines, and a gate driver that supplies a gate signal to at least one of the gate lines and includes a plurality of stages. Each stage includes a pull-up transistor to apply a turn-on voltage of a first clock signal to an output terminal responsive to a voltage at a Q-node, a pull-down transistor to apply a turn-off voltage to the output terminal responsive to a voltage at a QB-node that holds the turn-on voltage during a period in which the output terminal is applied the turn-off voltage, and a QB-node control unit to apply the turn-on voltage to the QB-node responsive to the first clock signal and a second clock signal in reverse-phase with the first clock signal. Accordingly, a display panel may include a gate driver that can set, reset, and hold the voltage at a QB-node.

Gate driver and display panel having the same

A display device includes a substrate which includes a display area including at least one optical area and a normal area and including a plurality of pixels and a non-display area and a plurality of signal lines extending from both sides of the display area to the plurality of pixels in a row direction, wherein the plurality of signal lines includes a first signal line and a second signal line which are disposed on different rows on both sides of the optical area and transmit the same signal and a detour line which is connected to the first signal line and the second signal line on the both sides of the at least one optical area and detours the at least one optical area.

Display device comprising an optical area without a signal line

A gate driving circuit and an image display device including the gate driving circuit are provided. In some embodiments of the present disclosure, the gate driving circuit includes a plurality of stages configured to sequentially and repeatedly output a plurality of scan pulses having different pulse widths in response to a gate control signal applied from a timing controller and the plurality of stages sequentially generate the plurality of scan pulses having different pulse widths and phase-delayed in response to three-phase clock pulses among the gate control signals and sequentially supply the plurality of scan pulses to gate lines of a display panel to selectively adjust a light emission period or a color display period for each red pixel, green pixel, and blue pixel, thereby improving image quality.

Gate driving circuit and image display device including ihe same

An electroluminescent display device includes sub-pixels connected to gate lines, and a gate driver configured to supply a scan signal to at least one of the gate lines, and including stages. One of the stages includes a QB-node regulation unit configured to charge a QB-node and a QP-node to turn-on voltage by using a first gate clock signal and a second gate clock signal, and a pull-down unit configured to output a turn-off voltage in response to a voltage of the QP-node. The QB-node regulation unit includes a QP-node control part configured to invert a phase of a voltage of a Q1-node and apply the voltage of the inverted phase to the QP-node, and a QB-node control part configured to bootstrap the QP-node. Accordingly, by employing the gate driver including the QB-node regulation unit that provides a stable voltage to the QB-node and the QP-node, the reliability of the gate driver can be improved, and the bezel of the electroluminescence display device can be reduced.

Gate driver and electroluminescence display device including the same

Provided is a liquid crystal display device according to an embodiment of the present disclosure. The display device includes: a first metal layer, a first insulating layer, a second metal layer, a second insulating layer, and a third metal layer deposited in sequence on a substrate. The first insulating layer and the second insulating layer include a one-hole bridge contact portion for exposing a part of the first metal layer and a part of the second metal layer at one time. The third metal layer is realized to be in contact with the first metal layer and the second metal layer through the one-hole bridge contact portion.

Liquid crystal display device and manufacturing method thereof

Disclosed is a display device including features that suppresses threshold voltage variation among the oxide thin-film transistors of an array substrate and a method for manufacturing the same. The display device includes a first COG block including sub-pixels configured to receive an output signal from a first drive integrated circuit positioned in a first COG area; a second COG block including sub-pixels configured to receive an output signal from a second drive integrated circuit positioned in a second COG area; and an equipotential line extended from the first COG area to the second COG area.

Display device and method for manufacturing the same

A display device according to an embodiment includes a plurality of driving blocks including a plurality of gate lines and a gate shorting structure spaced apart from the gate lines by an amount equal to a trimming region; an equipotential line extending from one of the driving blocks to an adjacent driving block, part of which is removed by the amount equal to the trimming region; a gate dummy line extending from at least one of the driving blocks; a plurality of data lines intersecting the gate lines; and an active layer disposed between the gate dummy line and the data lines, wherein some part of the active layer that overlaps the gate dummy line but does not overlap the data lines is removed.

Growing community of inventors

Goyang-si, South Korea

MiHee Shin