Samsung Display Co., Ltd.

Samsung Mobile Display Co., Ltd.

Mihae Kim

Kyonghwan Oh

Minchae Kwak

Kyeonghwa Kim

Jae-Ho Choi

Seunghan Jo

Sumi Jang

Nuree Um

Hyungjun Park

Jaeho Choi

Junyong An

Kyunghoon Kim

Wando Lee

Seungyeon Cho

Wonkyu Kwak

Jaewon Kim

Kyung-Hoon Kim

Junwon Choi

Jinkoo Chung

Wonmi Hwang

Seunghee Lee

Minku Lee

Changsoo Pyon

Minjeong Kim

Jaedu Noh

Kyunghyun Choi

Chaehan Hyun

Woongsik Choi

Changwon Jeong

A display apparatus includes: a substrate including a display area and a peripheral area outside the display area; a first data line extending from the display area into the peripheral area; a 1-1lower load located in the peripheral area and electrically connected to the first data line; a 1-2lower load located in the peripheral area and electrically connected to the 1-1lower load; a 1-1upper load located in the peripheral area and above the 1-1lower load, where the 1-1upper load is insulated from the 1-1lower load; and a 1-2upper load located in the peripheral area and above the 1-2lower load, where the 1-2upper load is insulated from the 1-2lower load and electrically connected to the 1-1upper load.

Display apparatus

A display apparatus includes: a substrate including: a first region; a second region; a first non-display area surrounding the first region and the second region; and a display area surrounding at least a portion of an outline of the first non-display area; a plurality of dummy pixels at the first non-display area, and to not emit light; a plurality of emission control lines connected to at least one of the plurality of dummy pixels; and a plurality of power supply lines to supply a driving voltage to the plurality of dummy pixels, respectively. One of the plurality of power supply lines is electrically connected to one of the plurality of emission control lines, and one of the plurality of power supply lines is connected to one of the plurality of dummy pixels.

Display apparatus including dummy pixels in a non-display area

A display device includes a circular display area and a non-display area surrounding the circular display area. The display device may further include a load matcher disposed adjacent to an edge of the circular display area in the circular display area, a pixel disposed in the circular display area, spaced apart from the non-display area by the load matcher, and connected to the load matcher, and a repair pixel disposed adjacent to the edge of the circular display area in the non-display area, and connected to the pixel.

Display device

A display device includes a substrate on which a display area including a plurality of pixels and a non-display area surrounding the display area are defined, a first voltage line disposed on the substrate in the non-display area, where the first voltage line provides a first voltage to the pixels, a second voltage line disposed on the substrate in the non-display area, where the second voltage line provides a second voltage to the pixels, and a first demux circuit area and a second demux circuit area disposed on the substrate in the non-display area, where the first demux circuit area and the second demux circuit area transmit data signals to the pixels. The first voltage line passes an area between the first demux circuit area and the second demux circuit area.

A display device includes a substrate including a display region, a hole, and a hole edge region surrounding the hole, first data lines disposed on the substrate, extending in a first direction, arranged in a second direction intersecting the first direction in the display region, and bypassing the hole along the hole edge region, and second data lines disposed on the substrate, extending in the first direction, alternately arranged with the first data lines in the second direction in the display region, and bypassing the hole along the hole edge region. At least one of the first data lines intersects at least one of the second data lines such that the first data lines are disposed adjacent to each other and the second data lines are disposed adjacent to each other in the hole edge region.

Display device with intersecting data lines adjacent hole region and electronic device including the same

A display apparatus includes: a first pixel circuit on the substrate and including a first driving thin-film transistor and a first storage capacitor electrically connected to the first driving thin-film transistor; a second pixel circuit adjacent to the first pixel circuit and including a second driving thin-film transistor and a second storage capacitor electrically connected to the second driving thin-film transistor; a first initialization voltage line electrically connected to the first pixel circuit and the second pixel circuit; a second initialization voltage line electrically connected to the first initialization voltage line; and a driving voltage line between the first pixel circuit and the second pixel circuit, wherein a channel area of the first driving thin-film transistor or a channel area of the second driving thin-film transistor is between the second initialization voltage line and the driving voltage line.

A display device may include a substrate including a circular display area and a non-display area, a plurality of pixels including a first pixel and a second pixel disposed on the display area of the substrate, a first sub-demux circuit connected to the first pixel and disposed on the non-display area, a second sub-demux circuit connected to the second pixel and disposed on the non-display area, a first connection line connected to the first sub-demux circuit and the second sub-demux circuit and disposed on the non-display area to transfer first and second data input signals to the first and second sub-demux circuits, and a plurality of gate stages connected to the pixels and disposed on the non-display area to transfer gate signals to the pixels. Some of the gate stages are disposed between the first sub-demux circuit and the second sub-demux circuit.

Round display device having a demultiplexer located between gate stages and light emitting stages

A display device includes a substrate including a display area and a peripheral area, a thin film transistor arranged on the substrate, a first metal wiring layer electrically connected to the thin film transistor, an inorganic protective layer on the first metal wiring layer, a patterned first organic film layer located on the inorganic protective layer and overlapping the first metal wiring layer in a plan view, a second metal wiring layer on the first organic film layer, and a second organic film layer on the second metal wiring layer, where the first organic film layer is patterned to be arranged at a position where the first metal wiring layer and the second metal wiring layer overlap each other in the plan view, and is not arranged on an entirety of the display area, and the second organic film layer is arranged on the entire display area.

Display device with patterned organic film at metal wiring overlap in display area

Display device having a circular display area and non-display area with demux circuit

A display panel includes: a substrate including an opening area, a non-display area at least partially surrounding the opening area, and a display area; a plurality of first lines, each of which includes a first bypass portion along the opening area; a plurality of second lines, each of which includes a second bypass portion along the opening area; and a shield layer overlapping at least one first bypass portion. Each of the first lines includes a first or second conductive line in the non-display area. Each of the first and second conductive lines includes the first bypass portion. The first and second conductive lines are alternately arranged and are disposed on different layers. Each of the second lines includes a third conductive line in the non-display area. Each of the third conductive lines includes the second bypass portion, and at least partially overlaps the first or second conductive line.

Display panel with shielded signal lines routed around an opening area in the display panel

A display apparatus includes a substrate including a transmitting area, a display area surrounding the transmitting area, a first non-display area disposed between the transmitting area and the display area, and a second non-display area surrounding the display area. A plurality of pixels is arranged in the display area. A set of 2n connection wirings (where n is a positive integer) is disposed in the first non-display area and each of the 2n connection wirings extends along at least a part of an edge of the transmitting area. Each of a plurality of voltage wirings extends in a first direction and is connected to at least some of pixels disposed in a common row from among the plurality of pixels. Each of the plurality of voltage wirings is connected to one of the 2n connection wirings.

Display apparatus having a transmitting area

A driver for a display may include a first signal processor adapted to output first and third control signals, and a second signal processor adapted to output a second control signal. The first signal processor may include a first shift register adapted to receive clock signals, and a first input signal, and to output a shifted signal. A first logic gate may be adapted to receive the shifted control signal and a separation signal to output the first control signal. A second logic gate may be adapted to receive the shifted signal and a negative separation signal, and to output the third control signal. The second signal processor may include a second shift register adapted to receive clock signals and the second input signal, and to output a shifted signal, and a first inverter adapted to receive the shifted signal of the second shift register and to output a second control signal.

Organic electroluminescent display and a driver thereof

A scan driver may include first signal processor adapted to receive an initializing signal, a base clock signal, a base negative clock signal and a feedback signal, and to generate a first output signal, a second signal processor adapted to receive the initializing signal, the first output signal, the base clock signal and the base negative clock signal, and to generate a second output signal and a second negative output signal, a first logic gate adapted to receive the base clock signal and the second output signal, and to generate a first clock signal, and a second logic gate adapted to receive the base clock signal and the second negative output signal, and to generate a second clock signal.

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Yongin-si, South Korea

Mihae Kim