Taiwan Semiconductor Manufacturing Comp. Ltd.

Mediatek Singapore Pte. Ltd.

Miguel Gandara

Eric Soenen

Martin Kinyua

Tamer Mohammed Ali

Ramy Awad

E-Hung Chen

A receiver front-end includes a first variable-gain amplifier that performs attenuation; a continuous time linear equalizer coupled to the input or output of the first variable-gain amplifier, wherein a combination of the first variable-gain amplifier and the continuous time linear equalizer produces a processed signal; a plurality of track-and-hold circuits that sample the processed signal in an interleaved manner; and a plurality of second variable-gain amplifiers receiving input signals from the plurality of track-and-hold circuits respectively.

Hybrid receiver front-end

An analog-to-digital converter (ADC) circuit includes a first ADC stage comprising a first successive approximation register (SAR) circuit that is configured to convert a current analog input signal into a first digital signal corresponding to a most-significant-bits (MSB) portion of a current digital output signal, and to generate a residual voltage corresponding to a voltage value difference between the current analog input signal and the first digital signal; a second ADC stage, coupled to the first ADC stage, comprising an amplifier circuit that is configured to amplify the residual voltage; and a third ADC stage, coupled to the second ADC stage, comprising a second SAR circuit that is configured to convert the amplified residual voltage into a second digital signal corresponding to a least-significant-bits (LSB) portion of the current digital output signal when the first SAR circuit receives a subsequent analog input signal.

Hybrid analog-to-digital converter

Growing community of inventors

San Jose, CA, United States of America

Miguel Gandara