Kabushiki Kaisha Toshiba

Toshiba Electronic Devices & Storage Corporation

Jsr Corporation

Nuflare Technology, Inc.

Mie Matsuo

Nobuo Hayasaka

Katsuya Okumura

Keiichi Sasaki

Haruo Okano

Chiaki Takubo

Hisashi Kaneko

Kazumasa Tanida

Masahiro Sekiguchi

Tsutomu Sato

Kyoichi Suguro

Ichiro Mizushima

Hiroyuki Yano

Yoshitaka Tsunashima

Shinichi Takagi

Hirokazu Ezawa

Hideshi Miyajima

Atsuko Kawasaki

Jun-ichi Wada

Kenichi Imamiya

Kenji Takahashi

Tamio Ikehashi

Shigeo Ohshima

Junichi Wada

Tatsuya Ohguro

Noriaki Matsunaga

Rempei Nakata

Yuui Shimizu

Ikuko Inoue

Yasutaka Sasaki

Hideo Numata

Hiroshi Ikegami

Koji Sakui

Hideo Aoki

Ichiro Omura

Yusuke Kohyama

Takamasa Usui

Kenichi Matsushita

Sachiyo Ito

Mitsuyoshi Endo

Tsunetoshi Arikado

Itsuko Sakai

Shuichi Sekine

Masahiro Miyata

Tomohiro Takase

Masaaki Hatano

Kazutaka Akiyama

Kenichi Kataoka

Tsuyoshi Matsumura

Takashi Yoda

Jun Hirota

Hirotaka Shida

Susumu Harada

Hiroshi Yamashita

Kenichiro Hagiwara

Takashi Shirono

Hidemi Ishiuchi

Yoshimi Hisatsune

Kazuo Kawaguchi

Hideo Shinomiya

Masayuki Ayabe

Shiro Okada

Hiroshi Ikenoue

Shinsuke Nabeya

Yoshiteru Koseki

Takuto Inoue

Hiroki Neko

Koushi Tozuka

Satoshi Matsui

Kazuhiko Nakadate

Yasumasa Mori

Kazushiro Nomura

Mika Fujii

A semiconductor device according to an embodiment includes a first substrate including a first insulating layer, a first conductive layer provided in the first insulating layer, a first metal layer provided in the first insulating layer, and a second metal layer provided between the first metal layer and the first conductive layer, a linear expansion coefficient of the second metal layer being higher than that of the first metal layer; and a second substrate including a second insulating layer, and a third metal layer provided in the second insulating layer, in contact with the first metal layer. The second substrate contacts with the first substrate.

Semiconductor device

A semiconductor device according to the embodiments includes: a first substrate having a plurality of first through-holes; a plurality of first electrodes provided on the first substrate to be adjacent to the respective first through-holes; a plurality of second electrodes provided on the first substrate to be adjacent to the respective first through-holes and to face the respective first electrodes; and a second substrate provided to face the first substrate, the second substrate having a plurality of second through-holes facing the respective first through-holes, at least a surface of the second substrate facing the first substrate having conductivity, the second substrate being electrically connected to the second electrodes.

According to an embodiment, a method for manufacturing a semiconductor device includes: selectively forming a plurality of mask layers on a first surface of a semiconductor substrate, and the semiconductor substrate having the first surface and a second surface; dividing the semiconductor substrate by forming a gap piercing from the first surface to the second surface of the semiconductor substrate, the gap being formed by dry-etching the first surface of the semiconductor substrate exposed between the plurality of mask layers, and a width of the gap on the second surface side being larger than a width of the gap on the first surface side; and forming a first electrode under a reduced-pressure atmosphere on the first surface of the semiconductor substrate after the semiconductor substrate being divided.

Method for manufacturing semiconductor device that includes dividing semiconductor substrate by dry etching

According to one embodiment, an optical waveguide sensor chip includes an optical waveguide layer; a pair of optical elements disposed at both ends of the optical waveguide layer so that light enters the optical waveguide layer and the light exits from the optical waveguide layer; a functional film formed on a predetermined region of the optical waveguide layer; a covering layer formed in a planar region on the light entrance surface of the optical waveguide layer, in which at least the optical elements are disposed; a first through hole configured to allow the light entering the entrance-side optical element to pass therethrough; and a second through hole configured to allow the light exiting from the exit-side optical element to pass therethrough.

Optical waveguide sensor chip, optical waveguide sensor, and method for manufacturing optical waveguide sensor chip

According to an embodiment, a method of manufacturing a semiconductor device includes polishing a peripheral portion of the semiconductor substrate, and forming a protective film to be an insulating film, on a surface of the semiconductor substrate including a surface exposed by the polishing.

Method of manufacturing semiconductor device, semiconductor device, and camera module

According to one embodiment, a manufacturing method of a semiconductor device is disclosed. The semiconductor device includes a semiconductor substrate having first and second main surfaces, and a through hole passing through between the first and second main surfaces, a pad on the first main surface, a through electrode in the through hole, and a connection structure including a connection portion to directly connect the pad and the through electrode, and another connection portion to indirectly connect the pad and the through electrode. The method includes forming an isolation region in the first main surface, the isolation region being in a region where the through electrode is to be formed and being in a region other than the region where the through hole is to be formed, forming the pad, and forming the through hole by processing the substrate to expose a part of the pad.

Semiconductor device and manufacturing method thereof

A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.

Multichip semiconductor device, chip therefor and method of formation thereof

A surface treatment composition of this invention is a composition for treating a metal wiring-including surface of a semiconductor substrate, which includes a compound (A) represented by a specific structural formula and a solvent (B) having a boiling point at one atmospheric pressure of 50 to 300&#xb0; C., and has a pH of 4 to 11. According to the surface treatment composition of the present invention, oxidation of metal wiring of a semiconductor substrate can be suppressed and deterioration of the flatness of the metal wiring portion due to unusual oxidation can be suppressed. Furthermore, when an insulating film or a barrier metal film is present on a metal wiring-including surface of the semiconductor substrate, fang and surface roughness of the metal wiring occurring in the interface between the metal wiring and the insulating film or the barrier metal film can be suppressed.

Surface treatment composition, surface treatment method, and method for manufacturing semiconductor device

Semiconductor device includes semiconductor substrate, through hole having first opening and second opening, and including an expansion portion so that an opening area of first opening is greater than an opening area of lowermost portion of expansion portion, first insulating layer, and having an opening which communicates with through hole and has an area smaller than opening area of first opening, first wiring layer provided on first insulating layer, second insulating layer provided on expansion portion of through hole, and to cover first opening and an inner wall surface of through hole, second insulating layer having an opening communicating with opening of first insulating layer so as to expose first wiring layer through opening of first insulating layer, and second wiring layer provided on second insulating layer to extend from inside of through hole, and being connected to first wiring layer via openings of first and second insulating layers.

Semiconductor device, through hole having expansion portion and thin insulating film

A semiconductor package includes a solid-state imaging element, electrode pad, through-hole electrode, and light-transmitting substrate. The solid-state imaging element is formed on the first main surface of a semiconductor substrate. The electrode pad is formed on the first main surface of the semiconductor substrate. The through-hole electrode is formed to extend through the semiconductor substrate between the first main surface and a second main surface opposite to the electrode pad formed on the first main surface. The light-transmitting substrate is placed on a patterned adhesive to form a hollow on the solid-state imaging element. The thickness of the semiconductor substrate below the hollow when viewed from the light-transmitting substrate is larger than that of the semiconductor substrate below the adhesive.

Semiconductor package and camera module

A semiconductor device, a semiconductor memory tester, and a multi-chip package are provided. The semiconductor device includes a plurality of nonvolatile semiconductor memories; a boosting circuit which generates a boosted voltage for operating the plurality of nonvolatile semiconductor memories; and a boosting circuit controller which controls the operation of the boosting circuit to generate the boosted voltage on the basis of an operation sequence of the plurality of nonvolatile semiconductor memories.

Semiconductor device and semiconductor memory tester

A solid-state image pickup apparatus includes an image pickup pixel unit in which a plurality of pixels each including a photoelectric conversion element and a field-effect transistor are arranged on a semiconductor substrate so that a light-receiving surface is disposed at a first surface side of the semiconductor substrate; a peripheral circuit unit provided at a periphery of the image pickup pixel unit of the semiconductor substrate; and a multilayered wiring layer in which a plurality of wiring layers for driving the field-effect transistor of the image pickup pixel unit are laminated at a second surface side of the semiconductor substrate, wherein a wiring in each of the wiring layers constituting the multilayered wiring layer is disposed so that a coverage of the wiring located at least in the image pickup pixel unit of the semiconductor substrate reaches 100%, viewed from the second surface side.

Back-illuminated type solid-state image pickup apparatus with peripheral circuit unit

The present invention provides a solid-state image pickup device including an image pickup pixel section which is provided on a semiconductor substrate and in which a plurality of pixels each having a photoelectric conversion element and a field-effect transistor are arranged, and a peripheral circuit section for the image pickup pixel section. An interconnect layer driving the field-effect transistor in the image pickup pixel section is formed on a first surface side of the semiconductor substrate. A light receiving surface of the photoelectric conversion element is located on a second surface side of the semiconductor substrate. The solid-state image pickup device includes a first terminal exposed from the second surface side of the semiconductor substrate, and a second terminal electrically connected to the first terminal and connectable to an external device on the first surface side of the semiconductor substrate.

Back-illuminated type solid-state image pickup device and camera module using the same

Growing community of inventors

Kamakura, Japan

Mie Matsuo