Panasonic Corporation

Michiyo Yamamoto

Kenji Murata

Tsuyoshi Ebuchi

Yoshihide Komatsu

Masakazu Shigemori

Kazuya Hatooka

A clock and data recovery circuit includes a multiphase clock generator circuit which generates a multiphase clock having a plurality of clocks, a sampling circuit which samples a received data signal transferring serial data in synchronism with each of the plurality of clocks, and generates a plurality of data signals, a data recovery unit which generates a selection signal indicating a data signal having an appropriate phase among the plurality of data signals, and a storage unit which stores the selection signal. The data recovery unit selects one of the plurality of data signals, based on the selection signal read from the storage unit, and a clock corresponding to the selected data signal.

Clock and data recovery circuit

A spread spectrum controller () controls a PLL () so that the PLL outputs a spread-spectrum processed clock signal. A loop bandwidth controller () controls at least one of a phase detector (), a loop filter (), a voltage-controlled oscillator (), and a frequency divider () in the PLL () during operation of the spread spectrum controller () to change a loop bandwidth of the PLL ().

Spread spectrum clock generation device

An external input operation clock signal is required for operating a conventional A/D converter, and the performance of the A/D converter is undesirably determined by the characteristics of the external input operation clock. A clock generator circuit for automatically generating an operation clock is provided inside an A/D converter to make the A/D converter require no external input operation clock. Further, a circuit for detecting the operation times of the constituents of the A/D converter is provided to generate a clock with which the A/D converter is optimally operated, thereby realizing high-speed operation and low power consumption.

A/D converter

A calibration circuit () adjusts at least one of one of a charging current of a charge pump circuit () and a capacitance value of a filter capacitor in a loop filter circuit () and a gain of a voltage controlled oscillator (), depending on a frequency of a reference clock signal input to a calibration circuit ().

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Osaka, Japan

Michiyo Yamamoto