Shinko Electric Industries Co., Ltd.

Michiro Ogawa

Junichi Nakamura

Kazuhiro Kobayashi

Kotaro Kodani

Kentaro Kaneko

Hiromi Denda

An electronic component-embedded substrate includes a first insulation layer having a quadrangular cavity formed therein, and an electronic component arranged in the cavity. The cavity has two adjacent first inner wall surfaces, protrusions protruding inward from the two first inner wall surfaces, respectively, and two adjacent inclined second inner wall surfaces arranged at opposite sides to the two first inner wall surfaces and inclined downward from an outer side toward an inner side. The electronic component is in contact with the protrusions of the cavity.

Electronic component-embedded substrate and electronic component device

A wiring board includes a wiring forming region in which a plurality of wiring layers are stacked while sandwiching insulating layers, an outer periphery region which is arranged around the wiring forming region and in which a reinforcing pattern is formed in the same layer as each of the wiring layers. An area ratio of the reinforcing pattern to the outer periphery region and an area ratio of the wiring layer to the wiring forming region are substantially the same in each of the layers, and the reinforcing patterns exist without a gap in the outer periphery region when the wiring board is viewed in planar perspective.

Electronic component device

A wiring substrate includes an insulating layer including a reinforcement member and having a first surface and a second surface positioned on an opposite side of the first surface, an electrode pad exposed from the first surface, a layered body including first insulating layers and being formed on the second surface, the first insulating layers having a first insulating material as a main component, another layered body including second insulating layers and being formed on the layered body, the second insulating layers having a second insulating material as a main component, and another electrode pad exposed from a surface of the another layered body that is opposite to the layered body. The number of the first insulating layers is equal to that of the second insulating layers. The first insulating layers have a thermal expansion coefficient that is greater than that of the second insulating layers.

Wiring substrate, method for manufacturing the wiring substrate, and semiconductor package

A wiring board includes a pad exposed from an opening portion of an outermost insulating layer. The pad includes: a first metal layer, a surface of which is exposed from the wiring board; a second metal layer provided on the first metal layer and formed of a material effective in preventing a metal contained in a via inside the board from diffusing into the first metal layer; and a third metal layer provided between the second metal layer and the via, and formed of a material harder to be oxidized than that of the second metal layer. The thickness of the third metal layer is relatively thick, and is preferably selected to be three times or greater than a thickness of the second metal layer. A side surface of the third metal layer and a surface of the third metal layer to which the via is to be connected are roughed.

Method of manufacturing a wiring board having pads highly resistant to peeling

Wiring board and electronic component device

A wiring board includes a pad exposed from an opening portion of an outermost insulating layer. The pad includes: a first metal layer a surface of which is exposed from the wiring board; a second metal layer provided on the first metal layer and formed of a material effective in preventing a metal contained in a via inside the board from diffusing into the first metal layer; and a third metal layer provided between the second metal layer and the via, and formed of a material harder to be oxidized than that of the second metal layer. The thickness of the third metal layer is relatively thick, and is preferably selected to be three times or greater than a thickness of the second metal layer. A side surface of the third metal layer and a surface of the third metal layer to which the via is to be connected are roughed.

Growing community of inventors

Nagano, Japan

Michiro Ogawa