Kabushiki Kaisha Toshiba

Matsushita Electric Industrial Co., Ltd.

Mitsubishi Denki Kabushiki Kaisha

Mitsumi Electric Company Ltd.

Misawa Homes Co., Ltd.

Shin Nikkei Company, Ltd.

Michio Sasaki

Hirofumi Yamashita

Ryohei Miyagawa

Nagataka Tanaka

Keiji Mabuchi

Yoshiyuki Matsunaga

Hironori Nakajo

Eiji Oba

Noboru Nomura

Nobuo Nakamura

Yoshinori Iida

Satoshi Yamada

Tetsuya Yamaguchi

Joji Kane

Shinji Ohsawa

Hisanori Ihara

Akinori Yanase

Masahiro Saito

Hiroshi Yoshikawa

Akihiko Furukawa

Osamu Ishikawa

Ikuko Inoue

Hidetoshi Nozaki

Satoshi Ajiki

Hirotaka Ishihara

Takaaki Kamimura

Akihiro Hori

Takasi Yosida

Shinji Naka

Kazuhiro Yaegashi

Akio Miwa

Yukihiro Furusawa

Kenzo Kobayashi

Naoko Oya

Katsuya Tanioka

Hirokazu Kaidou

Isamu Miwa

A semiconductor chip constituting an image pickup device is provided on a substrate and includes a connection terminal and an image pickup portion. A lens sheet having a lens portion is provided on the semiconductor chip. A groove is formed in at least the substrate to expose the connection terminal. A conductor pattern is formed in the groove and has one end electrically connected to the connection terminal.

Micro camera module and method of manufacturing the same

An image sensor is mounted on a substrate. A base is further formed on the substrate. The base has an opening above the image sensor. A filter is fixed to the opening of the base. The filter has a projecting dam member in a peripheral portion thereof. A lens barrel holding lenses is disposed on the filter.

Miniature camera module with lens containing image sensor

A compact camera module is disclosed that is capable of preventing adhesion of dust to an image pickup device in the compact camera module. The compact camera module includes a lens unit including a lens and a lens holder holding the lens therein and an image pickup unit attached to the lens unit. The image pickup unit includes a circuit board, an image pickup device on the circuit board, a cover member arranged on the circuit board to cover the image pickup device, and an optical filter arranged with respect to the cover member to face the image pickup device. The image pickup device is disposed in a substantially closed space formed by the circuit board, the cover member, and the optical filter. After the image pickup device is mounted on the circuit board, the image pickup device is disposed in the substantially closed space, and therefore, the compact camera module can be assembled with no occurrence of dust adhesion to the image pickup device.

Compact camera module

A solid state imaging device comprises a plurality of unit cells formed in a surface region of a semiconductor substrate. Each of the unit cells comprises a photoelectric converter, an MOS-type read-out transistor for reading a signal from the photoelectric converter, an MOS-type amplifying transistor having a gate connected to a drain of the read-out transistor and for amplifying the signal read by the read-out transistor, a reset transistor having a source connected to the drain of the read-out transistor and for resetting a potential of a gate of the amplifying transistor, and an addressing element connected in series to the amplifying transistor and for selecting the unit cell. The read-out transistor is formed in a first device region in the semiconductor substrate. The reset transistor is formed in a second device region in the semiconductor substrate. The drain of the read-out transistor is connected to the source of the reset transistor through a wiring layer formed on the surface of the semiconductor substrate.

MOS-type solid state imaging device with high sensitivity

An antenna device comprising a conductive earth substrate, a receiving element located in the proximity of said conductive earth substrate and having a receiving terminal, and a transmitting element located in the proximity of said receiving element and having a transmitting terminal, characterized in that an end of said receiving element and an end of said transmitting element are connected to said conductive earth substrate for grounding through a common portion and the frequency band of said receiving element is different from that of said transmitting element.

Antenna unit, communication system and digital television receiver

An antenna apparatus having at least one radiating element. A second radiating element is located opposite a first radiating element. Earth is on the side opposite to the first radiating element with respect to the second radiating element thus opposite to the second radiating element. The second radiating element intervenes between the first radiating element and earth. Either the first or the second radiating element employs a feed terminal.

Antenna apparatus and communication system

This invention prevents an end portion of the LOCOS region having a large number of defects of an MOS sensor from depletion and thereby reduces the leak current that occurs in the defects in the end portion of the LOCOS region. An n-type layer region is formed in a surface area of a p-type substrate for constituting a photodiode with the p-type layer. A LOCOS region is formed on a p -type layer in a surface area of the silicon substrate as device separation region by oxidizing part of the silicon substrate. The n-type layer region and the LOCOS region are separated from each other by a predetermined distance. A contact region is formed and separated from the n-type layer region by a distance equal to the size of the gate electrode of the read-out transistor of the MOS sensor. A wiring layer is connected to the contact region. Then, a planarizing layer is formed to cover the n-type layer region, the LOCOS region, the gate electrode and the wiring layer.

Solid state imaging apparatus, method of manufacturing the same and video system using such solid state imaging apparatus

A MOS type image sensor has an image area that consists of a matrix of pixels and a peripheral circuitry area that drives the image area. To make the MOS type image sensor finer and finer, each of the pixels consists of a second p-well region having a lower impurity concentration than a first p-well region disposed in the peripheral circuitry area; a photodiode having a first main electrode region made of the second p-well region and a second main electrode region formed as a first n-diffusion layer disposed at the surface of the second p-well region; a read transistor having a first main electrode region made of the first n-diffusion layer, a second main electrode region formed as a second n-diffusion layer disposed at the surface of the second p-well region, a gate insulation film disposed on the surface of the second p-well region between the first and second n-diffusion layers, and a gate electrode disposed on the gate insulation film and connected to a read signal line; and an amplification transistor disposed in a third p-well region, having a gate electrode connected to the second main electrode region of the read transistor, a first main electrode region connected to an output signal line, and a second main electrode region. Since the impurity concentration of the second p-well region is low, scaled design rules are employable without causing &ldquo;white pixels&rdquo;, sensitivity deterioration, signal read voltage increase, or short-channel effect.

Mos type image sensor

This invention prevents an end portion of the LOCOS region having a large number of defects of an MOS sensor from depletion and thereby reduces the leak current that occurs in the defects in the end portion of the LOCOS region. An n-type layer region is formed in a surface area of a p-type substrate for constituting a photodiode with the p-type layer. A LOCOS region is formed on a p,-type layer in a surface area of the silicon substrate as device separation region by oxidizing part of the silicon substrate. The n-type layer region and the LOCOS region are separated from each other by a predetermined distance. A contact region is formed and separated from the n-type layer region by a distance equal to the size of the gate electrode of the read-out transistor of the MOS sensor. A wiring layer is connected to the contact region. Then, a planarizing layer is formed to cover the n-type layer region, the LOCOS region, the gate electrode and the wiring layer.

Solid state imaging apparatus, and video system using such solid state imaging apparatus

A MOS type image sensor has an image area that consists of a matrix of pixels and a peripheral circuitry area that drives the image area. To make the MOS type image sensor finer, each of the pixels consists of a second p-well region having a lower impurity concentration than a first p-well region disposed in the peripheral circuitry area; a photodiode having a first main electrode region made of the second p-well region and a second main electrode region formed as a first n-diffusion layer disposed at the surface of the second p-well region; a read transistor having a first main electrode region made of the first n-diffusion layer, a second main electrode region formed as a second n-diffusion layer disposed at the surface of the second p-well region, a gate insulation film disposed on the surface of the second p-well region between the first and second n-diffusion layers, and a gate electrode disposed on the gate insulation film and connected to a read signal line; and an amplification transistor disposed in a third p-well region, having a gate electrode connected to the second main electrode region of the read transistor, a first main electrode region connected to an output signal line, and a second main electrode region. Since the impurity concentration of the second p-well region is low, scaled design rules are employable without causing 'white pixels', sensitivity deterioration, signal read voltage increase, or short-channel effect.

MOS type image sensor

A photo-assisted CVD apparatus including a reaction chamber for storing a substrate, an inlet port for feeding a source gas into the reaction chamber, a light source for radiating light on the source gas fed into the reaction chamber to decompose the source gas upon radiating the light, thereby depositing a film on the substrate, an inlet port for supplying an etching gas into the reaction chamber, and a discharge electrode, arranged above the substrate and having a configuration, surrounding a space above the substrate, for exciting the etching gas.

Photo-assisted CVD apparatus

A roof panel with solar batteries and a roof structure with solar batteries, which can improve water blocking between adjacent solar batteries integral with the roof panel. On the inclined surface of the roof Y is disposed the base panel 2, on which support rails 37 (each having a two-stage structure with a gutter and a cylindrical section 37a and 37b) are provided. A plurality of solar battery panels 3, provided with a frame (having an upper and a lower frame member 6 and 7 and paired vertical frame members 8) therearound, are each provided between paired support frames 37. The lower frame member 7 has an extension 25 extending from its side nearer the eaves N and covering the upper frame member 6 of the adjacent panel 3. The base and solar battery panels 2 and 3 are made integral with one another in the factory to be supplied as a roof panel 1 with solar batteries. With this structure, water is blocked around the solar battery panel 3 by the frame (6 to 8) therearound. Rainwater having fallen onto the surface of the panel 3 is drained along the extension 25 to the panel 3 on the side of the eaves N, or is led side-wise to support rails (i.e., gutter sections 37a thereof) to be drained to the side of the eaves N.

Roof panel and roof structure with solar batteries

A CCD imager has an array of rows and columns of picture elements on a semiconductor substrate. A vertical charge transfer gate section extends in a first direction on the substrate to be associated with the columns. The transfer gate section includes CCD channels in the substrate, and insulated transfer gate electrodes overlying these CCD channels. A plurality of buffer electrodes are formed at a first level over the substrate surface to overlie the transfer gate electrodes. A plurality of shunt wires are formed at a second level over the substrate surface to overlie the buffer electrodes. The charge transfer gate electrodes and the buffer electrodes are connected with each other by first contact holes. The buffer electrodes and the shunt wires are coupled together by second contact holes. The second contact holes are distributed so that the repeat period thereof as defined at least in a second direction transverse to the first direction on the substrate is equal to or less than two picture elements, whereby their spatial frequency at least in the second direction is half the sampling frequency of photoconversion in the CCD imager, or more.

CCD image sensor with stacked charge transfer gate structure

A solid-state imaging device includes a substrate, and an array of charge-packet storage cells or picture elements (or 'pixels') arranged on the substrate, each including a storage diode that stores therein a signal charge packet indicative of an incident light. A charge transfer section is coupled with the array of picture elements. The transfer section includes a charge-coupled device (CCD) register layer that is spaced apart from the storage diode to define a channel region therebetween, and a first insulated electrode overlying the register layer and the channel region. A reset section is coupled to the storage diode, for potentially resetting the storage diode by additionally injecting an extra charge packet into the storage diode and by causing the charge to drained from the storage diode. A potential controller is provided which forces, when a signal charge packet is read out of the storage diode toward the CCD register layer, the storage diode to decrease in potential so that the storage diode becomes potentially less than its potential as set during the reset operation, while causing the channel region to be fixed at almost the same potential during the read operation and the reset operation.

Solid-state image sensing device with storage-diode potential controller

A solid-state imaging device includes an array of photosensitive cells, each of which includes a photoelectric conversion section, which is arranged on the surface of a substrate and has a light-receiving opening. The photoelectric conversion section generates a packet of electrical carriers in response to the amount of incident light thereinto through the opening. A charge transfer section is arranged adjacent to the photoelectric conversion section on the substrate surface. This transfer section defines thereunder a transfer channel region that extends linearly in a predetermined direction in the substrate surface, and causes the carriers thus obtained to move sequentially. A light-shield section is arranged to cover the photoelectric conversion section except the opening, for preventing an incident light coming through the opening from being introduced into the transfer channel region as a leak component, by cutting off an internal reflection path of the leak component thereto.

Growing community of inventors

Kamakura, Japan

Michio Sasaki