Panasonic Corporation

Matsushita Electric Industrial Co., Ltd.

Panasonic Intellectual Property Management Co., Ltd.

Michinari Tetani

Yoshifumi Nakamura

Hiroyuki Imamura

Kouichi Nagao

Hiroshige Hirano

Nozomi Shimoishizaka

Takayuki Tanaka

Yukihiro Kozaka

Masakazu Hamada

Nobuaki Tarumi

Minoru Fujisaku

A semiconductor device includes a first insulating film, a first wiring, a second insulating film, and a second wiring. The first insulating film is formed on a semiconductor substrate. The first wiring is formed on the first insulating film. The second insulating film is provided on the first insulating film to cover the first wiring. The second wiring is formed on the second insulating film. Furthermore, the second insulating film has a first opening part and a second opening part which expose the first wiring. The second wiring has a seed layer and a first plating layer. The first plating layer covers an entire side surface of the seed layer. The seed layer is not provided in the second opening part and a periphery thereof.

Semiconductor device

In a wafer level CSP package, with respect to signal wiringdisposed in a signal wiring disposition forbidden regionin the vicinity of external output terminals disposed in a package outer peripheral portion, since a stress generated at signal wiringcan be dispersed by disposing dummy wiringaround the signal wiringor by expanding the width of the signal wiring itself, occurrences of cracks in a surface protective film can be readily suppressed.

A semiconductor device of the present invention includes: a wiring boardin which a conductive wiringis formed on an insulating substratehaving an opening; a semiconductor elementthat has a circuit forming regionand an electrode pad, and is mounted on the wiring board with the circuit forming region facing the opening, the electrode pad being connected electrically to the conductive wiring via a protruding electrode; a sealing resinthat covers the connected portion between the electrode pad and the conductive wiring; a heat dissipating memberthat is disposed so as to have a portion facing the opening; and a filling materialthat has a heat conductivity higher than that of the sealing resin, and is filled into the opening, so as to be in contact with the circuit forming region of the semiconductor element and the heat dissipating member. Even when the wiring board has a small area, heat dissipation efficiency can be ensured, and low cost manufacture can be achieved.

Semiconductor device, method for manufacturing the same, and semiconductor device mounting structure

A flexible insulating base, a plurality of conductor wirings aligned on the flexible insulating base, and bump electrodes provided respectively in end portions of the plurality of conductor wirings in a region where a semiconductor chip is to be placed are provided. The semiconductor chip is mounted on the conductor wirings by bonding electrode pads formed on the semiconductor chip to the bump electrodes. An auxiliary conductor wiring formed similarly to the conductor wirings is provided on the insulating base, and an auxiliary bump electrode formed similarly to the bump electrodes is provided on the auxiliary conductor wiring, so that the electrode pads formed on the semiconductor chip can be registered with respect to the bump electrodes on the conductor wirings by positioning the semiconductor chip with reference to the auxiliary bump electrode. It is possible to configure a wiring board having register marks capable of positioning electrode pads of a semiconductor chip with respect to bump electrodes with high accuracy.

Wiring board

A wiring board includes: a flexible insulating base; a plurality of conductive wiringsarranged on the flexible insulating base; protruding electrodesprovided respectively at an end portion of the same side of each of the conductive wirings; external terminalsformed respectively at the other end portions of each of the conductive wirings; metal plating layers applied on the conductive wirings, the protruding electrodes and the external terminals; and solder resist layersformed respectively by coating the conductive wirings in regions between the end portions at which the protruding electrodes are provided and the external terminals. In the regions where the solder resist layers are formed, no metal plating layers are formed on the conductive wirings, and the surfaces of the conductive wirings to be contacted with the flexible insulating base are rougher than the surfaces not to be contacted with the flexible insulating base. Even when a film base is thin, bending stress applied to the conductive wirings is relieved sufficiently, and thus breaks in the wirings are suppressed.

Growing community of inventors

Osaka, Japan

Michinari Tetani