Matsushita Electric Industrial Co., Ltd.

Panasonic Corporation

Panasonic Intellectual Property Management Co., Ltd.

Michihito Ueda

Kiyoyuki Morita

Takashi Ohtsuka

Yukihiro Kaneko

Yu Nishitani

Kenji Toyoda

Eiji Fujii

Hideaki Adachi

Teruhiro Shiono

Kazuo Yokoyama

Takakiyo Harigai

Tatsuo Ito

Yoshiaki Tanaka

Kiyoshi Morimoto

Hiroyuki Tanaka

Atsushi Omote

Shinichi Mizuguchi

Toru Iwata

Katsuya Nozawa

Nozomu Matsukawa

Ichiro Yamashita

Shigeo Yoshii

Ayumu Tsujimura

Takashi Nishikawa

Jun Kajiwara

Shoji Miyake

Toyonori Munakata

The present invention provides a shock recording device includes: an electric power source; a vibration energy harvester including a first electrode and a second electrode, the vibration energy harvester converting an energy of a shock applied thereto into a potential difference between the first electrode and the second electrode; a first transistor including a first gate electrode, a first source electrode, and a first drain electrode, the first transistor further including a stacked structure of a ferroelectric layer and a semiconductor layer; and a second transistor including a second gate electrode, a second source electrode, and a second drain electrode. The second gate electrode is electrically connected to the first electrode. The second drain electrode is electrically connected to the electric power source. The second source electrode is electrically connected to the first gate electrode. The first source electrode is electrically connected to the second electrode.

Shock recording device

In a neural network circuit element, a neuron circuit includes a waveform generating circuit for generating an analog pulse voltage, and a switching pulse voltage which is input as a first input signal to another neural network circuit element; a synapse circuit is configured such that the analog pulse voltage generated in the neuron circuit of the neural network circuit element including the synapse circuit is input to a third terminal of a variable resistance element of the synapse circuit, for a permissible input period, in the first input signal from another neural network circuit element; and the synapse circuit is configured such that the resistance value of the variable resistance element is changed in response to an electric potential difference between a first terminal and the third terminal, which occurs depending on a magnitude of the analog pulse voltage for the permissible input period.

Neural network circuit and learning method thereof

A neural network circuit includes an error calculating circuit that generates an error voltage signal having a magnitude in accordance with a time difference between an output signal and a teaching signal corresponding to the output signal. A weight change pulse voltage signal is input to a synapse circuit of a neural network circuit element including a neuron circuit that output the weight change pulse voltage signal, and a switching pulse voltage signal is input to a synapse circuit of a neural network circuit element other than the neural network circuit element including the neuron circuit that output the switching pulse voltage signal. The neural network circuit element changes the amplitude of the weight change pulse voltage signal on the basis of the error voltage signal generated by the error calculating circuit.

Neural network circuit and learning method for neural network circuit

A random number generating device of the present disclosure includes: an arithmetic random number generator that generates an arithmetic random number sequence; an arithmetic random number converter that sequentially reads at least one arithmetic random number from the arithmetic random number sequence and converts a value of the read arithmetic random number into a voltage or current value of at least two predetermined levels of gray scale having an identical polarity; a hysteresis unit that outputs values depending on a presently-input voltage or current value and a previously-input voltage or current value with respect to the sequentially-input voltage or current value; and a threshold processor that binarizes the output of the hysteresis unit.

Random number generating device

The present invention provides a shock recording device, comprising: a vibration energy harvester comprising a first electrode and a second electrode, the vibration energy harvester converting an energy of a shock applied thereto into a potential difference between the first electrode and the second electrode; and a ferroelectric transistor comprising a gate electrode, a source electrode, and a drain electrode, the ferroelectric transistor further comprising a stacked structure of a ferroelectric layer and a semiconductor layer. The gate electrode is electrically connected to the first electrode. The source electrode is electrically connected to the second electrode. This shock recording device does not need a power source used to record a shock.

Provided is a novel actuator and a method for driving the same. The present invention is an actuator comprising a first laminate comprising a first (Bi, Na, Ba) TiOlayer between first and second electrode layers, a second laminate comprising a second (Bi, Na, Ba) TiOlayer between third and fourth electrode layers, and a tilt part provided between the first and second laminates. Both of the first and second (Bi, Na, Ba) TiOlayers are preferentially oriented in a [011] crystalline axis direction. Voltages V, V, V, and Vwhich satisfy Requirement A: V&#x3e;Vand V&#x3c;Vor Requirement B: V&#x3c;Vand V&#x3e;Vare applied to the first-fourth electrode layers so as to tilt the tilt part. One of the first edge and the second edge is moved in the [011] crystalline axis direction and the other is moved in the reverse direction thereof.

Actuator and method for driving the same

A neuron circuit in a neural network circuit element includes a waveform generating circuit for generating a predetermined pulse voltage, and a first input signal has a waveform of the predetermined pulse voltage. For a period having a predetermined duration of the predetermined pulse voltage generated within the neural network circuit element including the variable resistance element which is applied with the first input signal from another neural network circuit element, the first input signal is permitted to be input to the control electrode of the variable resistance element, to change the resistance value of the variable resistance element due to an electric potential difference generated between the first electrode and the control electrode which occurs depending on an input timing of the first input signal with respect to the period during which the first input signal is permitted to be input to the control electrode.

Learning method of neural network circuit

A neuron circuit in a neural network circuit element includes a waveform generating circuit for generating a bipolar sawtooth pulse voltage, and a first input signal has a bipolar sawtooth pulse waveform. For a period during which the first input signal is permitted to be input to a first electrode of a variable resistance element, the bipolar sawtooth pulse voltage generated within the neural network circuit element including the variable resistance element which is applied with the first input signal from another neural network circuit element is input to a control electrode of the variable resistance element. The resistance value of the variable resistance element changes due to an electric potential difference between the first electrode and the control electrode, the electric potential difference being generated depending on an input timing difference between a voltage applied to the first electrode and the voltage applied to the control electrode.

A resistance-capacitance oscillation circuit comprises an amplifier and a phase shifting circuit. The phase shifting circuit comprises at least three resistance-capacitance circuit elements, which comprise a resistance and a capacitance. At least one of the resistance-capacitance circuit elements comprises a variable resistance and a variable capacitance. The variable resistance is formed of a first electrode, a second electrode, a part of a semiconductor film, a part of a ferroelectric film, and a fourth electrode. The variable capacitor is formed of the second electrode, a third electrode, a fifth electrode, another part of the ferroelectric film, another part of the semiconductor film, and a paraelectric film.

Resistance-capacitance oscillation circuit

A resistance-capacitance oscillation circuit comprises an amplifier and a phase shifting circuit. The phase shifting circuit comprises at least three resistance-capacitance circuit elements, each of which comprises a resistance and a capacitor. At least one of the resistance-capacitance circuit elements comprises a variable resistance and a variable capacitor. The variable resistance is formed of a first electrode, a second electrode, a part of a semiconductor film, a part of a ferroelectric film, and a fourth electrode. The variable capacitor is formed of the second electrode, a third electrode, a fifth electrode, another part of the ferroelectric film, another part of the semiconductor film, and a paraelectric film.

A temperature sensor includes first and second lower electrodes, a ferroelectric layer having polarization, a semiconductor layer; and first to third upper electrodes. The second upper electrode is interposed between the first upper electrode and the third upper electrode in a plan view. The semiconductor layer includes a first channel disposed between the first upper electrode and the second upper electrode, and a second channel disposed between the second upper electrode and the third upper electrode. The ferroelectric layer includes a first ferroelectric part disposed below the first channel and a second ferroelectric part disposed below the second channel. A polarization direction of the first ferroelectric part is opposite to a polarization direction of the second first ferroelectric part. The temperature is calculated based on the output voltage from the second upper electrode and the voltage applied to the first upper electrode.

Pyroelectric temperature sensor and a method for measuring a temperature with the pyroelectric temperature sensor

In the operating method of the semiconductor memory device, (1) voltages V, V, Vs, and Vd, which satisfy V&#x3e;Vs, V&#x3e;Vd, V&#x3e;Vs, and V&#x3e;Vd, are applied to a first gate electrode, a second gate electrode, a source electrode, and a drain electrode to write a first resistance value, respectively, (2) the voltages V, V, Vs, and Vd, which satisfy V&#x3e;Vs, V&#x3e;Vd, V&#x3c;Vs, and V&#x3c;Vd, are applied to write a second resistance value, and (3) the voltages V, V, Vs, and Vd, which satisfy V&#x3c;Vs, V&#x3c;Vd, V&#x3c;Vs, and V&#x3c;Vd, are applied to write a third resistance value.

Semiconductor memory device and a method of operating thereof

The purpose of the present invention is to provide a method for driving an actuator in which unnecessary deformation is suppressed. The present invention provides a method for driving an actuator, comprising the following steps (a) and (b):

Actuator and method for driving actuator

Provided is a relatively easy-to-fabricate piezoelectric power generating element capable of generating a large amount of electric power while comprising a bridge-type vibration beam that is resistant to damage from external vibration. This element comprises a support member, a strip-shaped vibration beam, a piezoelectric layer, and electrodes. The first and second ends of the vibration beam are fixed to the support member. The piezoelectric layer and the electrodes are provided on the surface of the vibration beam. The vibration beam extends in a plane when it is not vibrating. The vibration beam has a first portion that extends from the first end fixed to the support member, a second portion that extends from the second end fixed to the support member, and a third portion that connects the end of the first portion opposite to the first end and the end of the second portion opposite to the second end. The vibration beam has a shape such that, when viewed in a direction perpendicular to the plane, a first direction in which the first portion extends is a direction closer to the second end, and a second direction in which the second portion extends is a direction closer to the first end, the first and second directions each make an angle of more than 0&#xb0; and less than 90&#xb0; with respect to a straight line connecting the center of the first end and the center of the second end, and the third portion intersects once the straight line.

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Kyoto, Japan

Michihito Ueda