Oki Electric Industry Co., Ltd.

Michihiro Amiya

Akihiro Nakamura

Toru Inoue

Tadao Takahashi

A library used for manufacturing a semiconductor IC and a method of manufacturing the semiconductor IC. The library includes structures designed with a predetermined design rule. The library has a main part including one or more circuit elements, and a connecting terminal connected to the main part. The connecting terminal has a width less than a minimum space between the conductive patterns of the predetermined design rule. The library further includes a head portion connected to the connecting terminal at an end thereof. A width of the head portion is greater than the minimum space between the conductive patterns of the predetermined design rule.

Library for storing pattern shape of connecting terminal and semiconductor circuit designed with different design rules

Method of manufacturing semiconductor IC

A gate array LSI having functional blocks formed by interconnecting a plurality of basic cells arranged on a semiconductor substrate in matrix form and either signal conductive patterns or first power conductive patterns. According to the gate array LSI, the first power conductive patterns are disposed on the plurality of basic cells arranged in line and are divided and disposed on the basic cells so as to interpose the signal conductive pattern therebetween. It is therefore possible to improve the efficiency of wiring macrocells.

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Tokyo, Japan

Michihiro Amiya