Fujitsu Corporation

Michiharu Hara

Aiichiro Inoue

Iwao Yamazaki

Eiji Yamanaka

Shinnosuke Fujiwara

Yukihito Kawabe

A phase locked loop circuit control device includes: a phase locked loop circuit configured to generate a clock signal; and a control unit configured to, when being instructed to change a frequency of the clock signal from a current frequency to a target frequency, control the phase locked loop circuit to make the frequency change stepwise from the current frequency to the target frequency, in which the control unit changes the frequency of the clock signal by a first change amount in a first frequency range out of the range of the current frequency to the target frequency, and changes the frequency of the clock signal by a second change amount in a second frequency range out of the range of the current frequency to the target frequency.

Phase locked loop circuit control device and control method of phase locked loop circuit

A semiconductor device includes: a circuit configured to operate according to a clock; a temperature sensor configured to detect a temperature of the circuit; and a controller configured to control a frequency of the clock based on a temporal difference of power consumption of the circuit when the temperature detected by the temperature sensor exceeds a predetermined value.

Semiconductor device and control method

A processing apparatus, which contains a processor that executes a program includes a series of instructions, includes a log recording unit configured to record an operation log of the processing apparatus; a managing unit configured to control a recording operation performed by the log recording unit and read the operation log recorded in the log recording unit; an input unit configured to detect, from among the series of instructions of the executed program; a start instruction that starts a process for delivering a control instruction destined for the managing unit to the managing unit and deliver the control instruction to the managing unit in response to the start instruction; and an output unit configured to receive the operation log read by the managing unit.

Processing apparatus and method for acquiring log information

A semiconductor device includes: a frequency setting information storage unit that stores sets of frequency information indicating setting of a frequency supplied by an oscillation unit and frequency identification information identifying the frequency information and outputs one of a plurality of pieces of the frequency information to the oscillation unit based on frequency identification information inputted thereinto; a speed setting information storage unit that stores speed identification information indicating a speed of the semiconductor device and frequency identification information corresponding to the speed identification information; a frequency identification information count unit that holds a value of the frequency identification information inputted into the frequency setting information storage unit; and a control unit that causes the frequency identification information count unit to increment or decrement the held value of the frequency identification information to approach a value of the frequency identification information stored in the speed setting information storage unit.

Semiconductor device and control method for semiconductor device

A processor having a plurality of hardware resources can perform separate controls within a proper range according to the dependent relations of hardware resources troubled. In case a notification is made of the failure of the hardware resources constituting the processor, a processor control method decides the range of the hardware resources, which cannot be used because of that failure, as a failure range, on the basis of the dependencies of the individual hardware resources predetermined, and stops the use of the hardware resources of the failure range on the basis of that decision result. When the use of the hardware resources indicated by the failure range is stopped, the hardware is not stopped before a predetermined operation is performed not to affect the instruction processing procedure outside of the failure range.

Processor controller, processor control method, storage medium, and external controller

In an instruction control apparatus that enables a plurality of instructions of different instruction lengths to be selected simultaneously from an instruction buffer, the amount of circuitry is reduced while achieving high speed processing. The instruction control apparatus includes a selection circuit and a pointer that points to the beginning of the next instruction word, within the instruction sequence fetched in a holding means, to be loaded into an execution stage. The selection circuit first selects a portion of the instruction sequence, starting from the beginning pointed to by the pointer and extending until reaching a maximum length of instructions that can be loaded into the execution stage, then simultaneously examines the lengths of instructions contained in the selected portion on the basis of a minimum instruction length unit, and selects the plurality of instructions to be loaded into the execution stage, based on the combination of the instruction lengths. One or more instructions thus selected are held in a plurality of loading ports.

Growing community of inventors

Kawasaki, Japan

Michiharu Hara