National Semiconductor Corporation

Michiel Antonius Petrus Pertijs

Willem Johannes Kindt

An apparatus includes a digital interface circuit configured to provide a digital interface. The digital interface is configurable based on a mode of operation of the digital interface circuit. The apparatus also includes input and output level-shift circuits. The input level-shift circuit is configured to shift a voltage level of an input signal for the digital interface circuit. The output level-shift circuit is configured to shift a voltage level of an output signal from the digital interface circuit. The input level-shifting and the output level-shifting are based on first and second level-shift input voltages. The apparatus further includes a mode detector configured to identify at least two modes of operation for the digital interface circuit based on the first and second level-shift input voltages. For example, the digital interface circuit could be configured to function as a serial or parallel interface depending on which level-shift input voltage is greater.

Integrated circuit with pin-selectable mode of operation and level-shift functionality and related apparatus, system, and method

An apparatus includes a plurality of amplifier stages configured to receive an input voltage and generate an amplified output current. Each amplifier stage includes a transconductance stage configured to receive the input voltage and generate a first intermediate output current. Each amplifier stage also includes an auto-zeroing loop configured to generate a second intermediate output current that at least partially corrects for an offset of the transconductance stage, where the auto-zeroing loop operates at a first frequency. Each amplifier stage further includes chopping circuitry configured to reverse a polarity of the input voltage and a polarity of the amplified output current at a second frequency, where the second frequency is less than the first frequency. Each amplifier stage is configured to operate in auto-zeroing and amplification phases. At least one amplifier stage operates in the auto-zeroing phase when at least one other amplifier stage operates in the amplification phase.

Chopped auto-zeroed ping-pong amplifier and related apparatus, system, and method

A circuit includes an input stage configured to receive and amplify an input signal to produce an amplified signal, where the input signal is referenced to a higher voltage and is associated with a common mode voltage. The circuit also includes level shifter resistors configured to level shift the amplified signal to produce a shifted signal. The level shifter resistors are configured to provide a voltage drop so that the shifted signal is referenced to a lower voltage. The input stage may include multiple transistors floating in one or more isolated portions of a substrate, where the transistors perform amplification in the input stage. The circuit may also include circuitry configured to control current through the level shifter resistors so that the voltage drop depends on the common mode voltage of the input signal. In addition, the lower voltage may be between supply rails of the circuit.

Growing community of inventors

's Hertogenbosch, Netherlands

Michiel Antonius Petrus Pertijs