Kabushiki Kaisha Toshiba

Hitachi, Ltd.

Hitachi Power Semiconductor Device, Ltd.

Michiaki Hiyoshi

Takashi Fujiwara

Hideo Matsuda

Katsunori Azuma

Shigeru Hasegawa

Hisashi Suzuki

Mitsuhiko Kitagawa

Koji Sasaki

Isamu Yoshida

Satoshi Yanagisawa

Keisuke Horiuchi

Takehide Yokozuka

Susumu Iesaka

Hironobu Kon

Kinya Nakatsu

Mutsuhiro Mori

Ryuichi Saito

Toshiya Satoh

Hiroshi Hozoji

Naoyuki Inoue

Atsuo Nishihara

Yoshihiko Koike

Ikuko Kobayashi

Yukihiro Kumagai

Katsuaki Saito

Kazunobu Nishitani

Seiichi Hayakawa

Satoshi Teramae

Toshiki Kurosu

Takahiro Fujita

Hisayoshi Muramatsu

Akihiro Muramoto

Tatuo Harada

Yoshinori Iwano

Kentaro Yasuda

Tatsuo Harada

Yoshinoro Iwano

In a semiconductor device where a metal circuit layer is disposed over a main planar surface of an insulating substrate, a semiconductor chip is connected by way of a solder over the metal circuit layer, and a metal wiring is connected over the metal circuit layer, in which a solder flow prevention area comprising a linear oxide material is formed between the semiconductor chip and the ultrasonic metal bonding region over the metal circuit layer.

Semiconductor device and a method of manufacturing same

The respective main electrodes of the semiconductor switching elements such as IGBTs, which are respectively mounted on the plurality of insulating boards, are electrically connected to each other via the conductor member. This configuration makes it possible to suppress the occurrence of the resonant voltage due to the junction capacity and the parasitic inductance of each semiconductor switching element.

Power semiconductor module

A power module includes a substrate having a surface on which a plurality of wiring patterns are formed, a semiconductor device mounted on the substrate and electrically connected to a part of the plurality of wiring patterns, and a terminal portion with a lead electrically connected to the other part of the plurality of wiring patterns, and is configured that the lead of the terminal portion is formed by laminating a plurality of metal members which contain a material substantially the same as or softer than the material for forming the other part of wiring patterns, and the material of the plurality of metal members, which is the same as or softer than the material for forming the other part of wiring patterns is electrically connected to the other part of wiring patterns through ultrasonic bonding.

Power module and manufacturing method thereof

In order to achieve reduction in loss, a semiconductor power module comprises DC terminals to be connected to a condenser module and the semiconductor power module is used in combination with a cooling jacket for cooling, and the DC terminals protrude toward the condenser module beyond the cooling jacket.

Semiconductor power module, inverter/converter including the same, and method of manufacturing a cooling jacket for semiconductor power module

A power module includes an upper arm circuit unit and a lower arm circuit unit each having a power semiconductor element; an insulating substrate with the units mounted on one surface thereof; a metal base bonded onto the other surface of the substrate opposite to the one surface where the units are mounted; a first connection conductor for supplying a high potential to the upper unit from outside; a second connection conductor for supplying a low potential to the lower unit from outside; an insulating sheet interposed between the conductors; and a resin case disposed on the metal base to support the conductors, the conductors are flat conductors and laminated with the sheet sandwiched therebetween; the sheet extends from one end of the laminated structure to secure the creepage distance between the conductors; and the case is furnished with a recess for containing the laminated structure.

Power module and vehicle-mounted inverter using the same

A semiconductor power module includes an insulated substrate with a plurality of power semiconductor devices mounted thereon and a heat sink for radiating heat generated from the plurality of power semiconductor devices, wherein the heat sink is integrally molded with a plurality of radiation fins on one surface of a planate base by forging work such that a metallic material filled into a female die of a predetermined shape is pressed by a male die of a predetermined shape, and the insulated substrate is bonded by metallic bonding to another surface of the base of the heat sink opposite the one surface of the base of the heat sink on which the radiation fins are formed.

Semiconductor power module, inverter, and method of manufacturing a power module

Portion of power module for power inverter

This is a semiconductor power module provided with: a ceramic substrate; a metallic plate bonded to a surface of this substrate; a cylindrical metallic flange which is hermetically bonded to a surface of substrate or the metallic plate; a ceramic housing for hermetically sealing an opening of the metallic flange; and at least one or more semiconductor chips soldered to the metallic plate. The metallic flange is made of metal with a low thermal expansion coefficient. A hermetically sealed container is created by welding the metallic flange, the ceramic substrate and the housing with silver brazing. Moreover, external collector, emitter and gate electrodes are bonded on the housing by using the silver brazing. The collector, emitter and gate conductive pillars are respectively connected to the external collector, emitter and gate electrodes with calking. Thus, this hermetically sealed container is strong in mechanical strength and high in explosion-proof durability and excellent in moisture resistance. And this semiconductor power module has a high TFT reliability and a high TCT reliability. Moreover, a power cycle durability is larger since the emitter pedals are pressure-contacted to the emitter electrode pads disposed on the semiconductor chip via the metallic hemispheres so as to implement a large conductive capacity.

Hermetically sealed semiconductor power module and large scale module comprising the same

A voltage-driven power semiconductor device includes a voltage-driven IEGT chip, a collector electrode plate, an emitter electrode plate, and an inductance material. The collector electrode plate is connected to the collector of the IEGT chip, and press-contacts the IEGT chip from its collector side. The emitter electrode plate press-contacts the IEGT chip from its emitter side. The inductance material has an inductance component and connects the emitter of the IEGT chip and the emitter electrode plate. In the voltage-driven power semiconductor device having this arrangement, an induced electromotive force is generated in the inductance material arranged between the emitter of the IEGT chip and the emitter electrode plate. This induced electromotive force can suppress a steep current change (di/dt) upon an OFF operation, and can further suppress a steep voltage change (dv/dt) caused by the current change (di/dt).

Voltage-driven power semiconductor device

An IGBT module comprises a ceramic substrate having a collector wiring element on a surface thereof, an IGBT chip provided on the collector wiring element, an insulative member provided on the collector wiring element and configured to cover at least edge portions of the IGBT chip, and an insulative sealing resin, provided on the ceramic substrate, for covering the IGBT chip and the insulative member. The sealing resin has lower insulation properties than the insulative member.

Semiconductor device including intermediate wiring element

A semiconductor device includes an active region with a main semiconductor device section, and a junction-termination region therearound. A first diffusion layer of a second conductivity type is formed in a surface of a first semiconductor layer of a first conductivity type, and extends from the active region into the junction-termination region. A second diffusion layer of the second conductivity type is formed in contact with the first diffusion layer, and extends in the junction-termination region. A first contact electrode is disposed in the active region and in contact with the first diffusion layer, and electrically connected to a first main electrode of the main semiconductor device section. A second contact electrode is disposed in the junction-termination region and in contact with the first diffusion layer, and surrounds the active region. A connection electrode electrically connects the first and second contact electrodes to each other.

Semiconductor device having junction-termination structure of resurf type

A multichip press-contact type semiconductor device including a plurality of semiconductor chips, a plurality of heat buffer plates, a conductive metal sheet, and first and second press-contact electrode plates. The heat buffer plates are disposed to correspond to the plurality of semiconductor chips. The conductive metal sheet is located on the plurality of heat buffer plates and substantially decreases the parasitic inductance by causing a short-circuit in electrode wiring connecting the semiconductor chips. The first press-contact electrode plate is located on the conductive metal sheet, and has column protrusions corresponding to the semiconductor chips on the surface facing the semiconductor chips. The second press-contact electrode plate is located on the side of the rear surface of the semiconductor chips. The first and second press-contact electrode plates hold therebetween the conductive metal sheet, the heat buffer plates, and the semiconductor chips, piled on each other.

Multichip press-contact type semiconductor device

Growing community of inventors

Yokohama, Japan

Michiaki Hiyoshi