Other

Evolutionq Inc.

Softwareq Inc.

Michele Mosca

Priyanka Mukhopadhyay

James Andrew Godfrey

Thomas Owen Parry

Olivia Nicole Di Matteo

Matthew Edward Joseph Amy

Sadegh Raeisi

Maria Kieferova

Vlad Gheorghiu

Sebastian Reynaldo Verschoor

Matthew Edward Amy

The present application recognizes the problem of reducing the CNOT-count in Clifford+T circuits on connectivity constrained architectures. Here, one can 'slice' the circuit at the position of Hadamard (H) gates and “build” the intermediate portions. Two kinds of partitioning are evaluated, namely: (i) a simple method of partitioning the gates of the input circuit based on the locality of H gates, and (ii) a second method of partitioning the phase polynomial of the input circuit. The intermediate {CNOT, T} sub-circuits can be synthesized using Steiner trees, similar to the work of Nash, Gheorghiu, Mosca [NGM20] and Kissinger, de Griend [KdG19]. The following algorithms have certain procedural differences that also help to further reduce the CNOT-count. The performances of the algorithms are compared while mapping different benchmark circuits as well as random circuits to some popular architectures like 9-qubit square grid, 16-qubit square grid, Rigetti 16qubit Aspen, 16-qubit IBM QX5, 20-qubit IBM Tokyo.

System and method for reducing CNOT count in Clifford+T circuits on connectivity constrained architectures

A method is provided for synthesizing quantum circuits while reducing the T-count, comprising, for a plurality of qubits: determining a target unitary and executing a set of candidate operations W with a single T gate and computing a specific function f of U Wkeeping the values of W that correspond to specific multiplicities such that after the first collection of W operators is selected a collection of unitaries U Wis determined to consider in the next round to build a tree. A method of synthesizing quantum circuits while reducing the T-depth is also provided, comprising, for a plurality of qubits: determining a target unitary and execute a set of candidate operations W with T depth of one and computing a specific function f of U W, keeping the values of W that correspond to specific multiplicities such that after the first collection of W operators is selected a collection of unitaries U Wis determined to consider in the next round to build a tree. A method of re-synthesizing quantum circuits while reducing T-depth is also provided, comprising, for a plurality of qubits considering all cluster sizes up to a maximum sized cluster, and continuing recursively.

System and method for optimizing quantum circuit synthesis

A system and method are provided for mitigating key-exhaustion attacks in a key exchange protocol. The method includes computationally confirming an exchange of key bits has provided fresh shared key material before information theoretically confirming the exchange of key bits has provided fresh shared key material, while maintaining synchronization between messaging parties. In one implementation, maintaining synchronization includes updating keys in between each post-processing message session and managing a local state of each messaging party in the key exchange protocol prior to sending a next post-processing message. In another implementation, maintaining synchronization includes hiding a message containing the information theoretic authenticator by executing a decoy authentication process, prior to using an information theoretical key.

System and method for mitigating key-exhaustion in a key distribution protocol

There is provided a method for implementing an algorithm for forming, or synthesizing, quantum circuits on a system capable of performing the quantum circuit synthesis by using a deterministic walk (i.e. a pseudo-random walk with a random or pseudo-random starting point). In one implementation, the deterministic walk is performed using a parallel search algorithm. In an implementation of the parallel search algorithm, a user utilizes a programming language to write instructions for a compiler. Then, a meet in the middle approach is utilized to separate the circuit into two halves. Next, the parallel search technique is used to find a claw, or a pair, which satisfies the circuit analysis. Subsequently there is the production of a result and/or a synthesis of the circuit if the pair is found.

Quantum circuit synthesis using deterministic walks

Quantum circuits include quantum gates that require a certain amount of physical resources. It is desirable to reduce the number of certain quantum gates in order to improve the hardware efficiency of a quantum circuit. A system and a method are provided for synthesizing a quantum circuit that includes the operations of determining an ordered set or vector of phase coefficients and specifying a linear permutation. The operations also include determining a sequence of CNOT and Rz gates using the set of phase coefficients and the linear permutation, such that the number of Rz gates is reduced.

Decoding-based method for quantum circuit optimization

A method for decreasing entropy in a system includes iteratively applying a set of electromagnetic (EM) pulses to the system, the set of EM pulses effect swaps between the following pairs of system energy levels: a first system energy level in which the reset system is in a lowest energy level and the target system is in a first target system energy level that is not a lowest energy level, and a corresponding second system energy level in which the reset system is in a highest energy level and the target system is in a second target system energy level that is next lowest in energy after the first target system energy level, and waiting a time period.

Growing community of inventors

Waterloo, Canada

Michele Mosca