Sgs-thomson Microelectronics S.a.

Michel Imbert

Alain Artieri

Thierry Meunier

Gerard Bret

Xavier Cauchy

Jean-Marc Merval

Jean-Louis Douche

Serge Volmier

Frederic Lambert

The present invention relates to a method for regulating, in the read mode, memory areas of a circuit for decompressing a video data flow compressed according to an MPEG standard, with respect to the writing rate of the compressed data flow into the memory areas, the decompression circuit issuing a flow of image data at the rate of signals for horizontally and vertically synchronizing the images issued by a circuit for coding according to a color television standard, this method including generating a clock signal having a fixed frequency for reading from the memory areas and for generating the horizontal and vertical synchronization signals, and shifting the occurrence of an edge triggering the vertical synchronization signal based on a signal indicative of the state of a buffer memory associated with the memory areas.

Digital television signal flow regulation

A system for converting digital television signals encoded according to an MPEG standard into standardized analog video signals. The system includes means for generating graphic images and for inserting corresponding image signals in a decoded digital flow of main image signals, a digital decoding unit, and an analog coding unit. The digital decoding unit includes means for providing a flow of multiplexed image signals including a first flow of main image signals and of a second flow of image signals that contains, in addition to the main image signals, possible graphic image signals. The analog coding unit includes a demultiplexer of the flow of multiplexed image signals and two encoders. The two encoders respectively receive the first and second flows, and each respectively provide a digital flow of images encoded according to a color television standard to digital-to-analog converters respectively associated therewith, the digital-to-analog converters providing the standardized analog video signals.

System for converting digital television signals with insertion of

A SECAM decoder comprises an input receiving a chrominance subcarrier (SP); first and second outputs delivering respectively the decoded blue (B2) and red (R2) signals; a first PLL phase demodulator (30) receiving the subcarrier (SP), operative only during the blue lines; a second PLL phase demodulator (31) receiving the subcarrier, operative only during the red lines; a first adder (32) receiving the output signal (B1) of the first demodulator (30) and this same signal delayed by a line period to deliver the decoded blue signal (B2); an adder (33) receiving the output signal (R1) of the second demodulator (31) and this same signal delayed by a line period to deliver the red decoded signal (R2).

SECAM decoder with phase-locked loop demodulators

A method for automatically identifying the PAL or NTSC color TV standard comprises the following steps: providing a first demodulation signal (IC1) with the regenerated 90.degree.-phased sub-carrier; providing a second demodulation signal at the reference frequency of one of the colors (FOR) of the SECAM standard; providing a first voltage (VC1) by integrating the first demodulation signal (IC1), and providing a first associated logic criterion (C1), simultaneously applying the first signal (IC1) at the input of an inverter switched according to the rate of a non-half line-frequency phased signal (FL/2), providing a second voltage (VC2) by integrating the output signal (ICC) of the inverter (31), and providing a second associated logic criterion (C2); similarly providing, but from the second demodulation signal (IC2), the first logic criterion (C1) and the second logic criterion (C2); and identifying the standard received as a function of the state of the first and second logic criteria (C1 and C2).

Automatic method for identifying a color TV standard

An automatic connection circuit on either of the input terminals of a TV set, each of these inputs receiving video signals according to one of several standards, comprising a standard identification circuit (10) and a selection circuit (11), the identification circuit sending an inhibition signal (IN) to the selection circuit when it has detected a selected standard; a switch (14), the first terminal (12) of which is connected to the input of the identification circuit and the second terminal of which is connected to either of the input terminals by the action of a control signal (16); a divider (15) receiving a periodic signal and providing a signal for controlling the selection circuit according to a first period and the switch according to a half period, this divider being inhibited by said inhibition signal.

Automatic connection system on a color TV S-VHS input

A detection circuit for a video tape recorder signal on the input of a TV set connected to a line synchronization separating circuit (11) in turn connected to a PLL (12) comprises a first phase comparator (15), the PLL (12) exhibiting a first time constant (I1, C1) corresponding to an operation on a normal TV signal. This circuit further comprises a switch (20) for switching the PLL on a second time constant (3I1, C1) shorter than the first one, a second phase comparator (22) for comparing the input and output phases of the first phase comparator, the second phase comparator being associated with a third time constant (I2, C2) shorter than the first and second ones, a threshold comparator (24) supplying to the switch (20) a control signal when the comparator output (22) is outside determined limits.

Growing community of inventors

Voiron, France

Michel Imbert