Marvell International Limited

Other

Innovative Silicon S.a.

Michel Declercq

Adil Koukab

Marc Pastre

Maher Kayal

Marija Blagojevic

Lionel Nicolas Portmann

Lionel Portman

A method of operating a phase lock loop includes generating a control voltage based on both an output signal of a voltage-controlled oscillator and a reference signal. An operating mode is selected from one of a high-gain mode, a zero-gain mode and a low-gain mode based on the control voltage. The phase lock loop is operated in the selected one of the high-gain mode, the zero-gain mode, and the low-gain mode. The control voltage is offset to generate an offset voltage based on the selected operating mode. The output signal is generated based on the offset voltage.

Analogue self-calibration method and apparatus for low noise, fast and wide-locking range phase locked loop

An apparatus includes a phase locked loop (PLL). The phase locked loop (PLL) has coarse tuning (CT), fine tuning-integer (FT-i), fine tuning fractional (FT-f), frequency modulator tuning-fractional (FMT-f), and narrowband (NB) modes of operation.

Apparatus and methods for mixed analog-digital frequency synthesizing and modulation

A phase lock loop (PLL) frequency synthesizer includes a reconfigurable voltage controlled oscillator (VCO) with three modes of operation: a Linear-High-gain, Zero-gain, and Low-gain mode. During the linear high gain mode, the VCO enables an analogue self-calibration of the PLL over a wide frequency tuning range. Control voltage at the input of the VCO is varied by the PLL to provide an output frequency. When the PLL is locked, the VCO is switched to the Zero-gain mode while maintaining the output.

There are many inventions described and illustrated herein. In a first aspect, the present invention is a technique and circuitry for reading data that is stored in memory cells. In one embodiment of this aspect, the present invention is a technique and circuitry for generating a reference current that is used, in conjunction with a sense amplifier, to read data that is stored in memory cells of a DRAM device. The technique and circuitry for generating a reference current may be implemented using an analog configuration, a digital configuration, and/or combinations of analog and digital configurations.

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Penthaz, Switzerland

Michel Declercq