Motorola Corporation

Freescale Semiconductor,inc.

Michel Burri

Eric Perraud

Christophe Landez

Will Specks

Steven Bruce McAslan

Matthew B Ruff

Hans Staufer

Bruno Baylac

Pascal Renard

Aldan J Pohlmeyer

A communication device comprising an internal power source, first and second receiver elements for receiving signals transmitted from the base station, and a processor selectively responsive to a modulation of the received signal to generate a data signal for transmission to the base station. The first receiver element has lower power consumption than the second receiver element does when energised. At least during a standby state of the device, the first receiver element is activated to detect the presence of a received signal, the second receiver element and the processing means being de-energised. The first receiver element is responsive to detection of a received signal to trigger an active state in which the second receiver element is activated to respond selectively to the frequency of the signal received to actuate the processor. The invention is applicable to vehicle access control systems, and tire pressure monitoring systems.

Passive communication device and passive access control system

A method of passive response communication, especially for an access control system, in which a first transponder () transmits an interrogation signal to a remote second transponder (), which responds by transmitting data back to the first transponder (), the two transponders each comprising a transmitter and a receiver, and a communication signal exchanged between said transponders () in at least one direction including a plurality of anti-relay-attack pulses (). At least one distinguishing pulse () selected among the anti-relay-attack pulses has a distinctive shape and the receiver of said communication signal is selectively responsive to the shapes of said plurality of pulses (). Interception of the transmitted signal in a relay attack using digital transceivers will not relay the distinctive shape and the response of the second transponder is inhibited.

Passive response communication system

Embodiments of the present invention related generally to communication systems. One embodiment contemplates a method for operating a communication bus where the method includes detecting a start of frame symbol on the communication bus; determining a length of the start of frame symbol; detecting a start of a synchronization field on the communication bus; determining a length of an adjusted synchronization field; determining if the length of the adjusted synchronization field is less than the length of the start of frame symbol; and if the length of the adjusted synchronization field is less than the length of the start of frame symbol, concluding that the start of frame symbol is valid and concluding that the synchronization field is valid. Embodiments of the invention may be used, for example, with the Local Interconnect Network (LIN) protocol.

Method and apparatus for operating a communication bus

A security system for actuating a security mechanism of a vehicle includes a transceiver coupled to the security mechanism and having one transmission channel for transmitting a first signal and a number of reception channels. A remote radio-frequency transponder key has a number of transmission channels and one reception channel matched to the respective reception and transmission channels of the transceiver. The transponder key is arranged to transmit an unlock signal to the transceiver upon reception of the first signal. The unlock signal is verified by the transceiver as valid before actuating the security mechanism. The transceiver is further arranged to select a channel for reception of the unlock signal and to embed the identity of the selected channel in the first signal, such that the transponder key transmits the unlock signal using the selected channel.

Security system and method

In accordance with an embodiment of the invention there is provided a sample and hold demodulator circuit ( ) for use in an automotive immobilizer to recover modulation information from a received modulated carrier signal (V ). Sample and hold circuitry samples signals to recover the modulation information therein, and control circuitry ( ) is coupled to the sample and hold circuitry for controlling operation thereof. The control circuitry includes shift register circuitry ( ) for receiving a second received signal having a same frequency as a carrier frequency of the received modulated carrier signal and for producing at its outputs signals (SAMPLE, SAMPLE , LATCH) for controlling operation of the sample and hold circuitry. The sample and hold demodulator circuit provides a single IC solution, allowing amplitude and phase demodulation to be performed with a single sample and hold circuit.

Sample and hold demodulator circuit

An improved loop antenna (10) comprises first (12) and second (16) conductive loops. Each of the first and second conductive loops has a discontinuity (14, 18). The first and second conductive loops (12, 16) are arranged substantially concentrically to form a capacitive coupling such that the tuned frequency of the loop antenna (10) has improved protection from external capacitance effects.

Loop antenna

An automotive sensor arrangement including an automotive sensor coupled via first and second wires to signal sensor evaluation means, a signal conditioning circuit comprising a first gate means connected to provide a bias operating voltage signal on said first wire to the sensor, a second gate means of similar construction to the first gate means and mounted in the same environment and first gate means, the second gate means being coupled to the second wire of the leas means for receive the voltage signal bears a predetermined relationship to the switching point voltage of the second gate means.

Sensor signal conditioning circuit

A short circuit detector circuit (10) for detecting when a sensor (2), such as a tachometer sensor in automotive applications, is operating normally and when the sensor is short circuited is disclosed. The detector circuit (10) comprises a reference signal input (16) for receiving a reference signal, and a closed loop (22, 24, 12, 14, 26, 34, 32) having a predetermined loop gain (K). The closed loop has a first input coupled to the reference signal input, a first output (12) coupled to drive the sensor with a signal dependent on the input signal and the predetermined loop gain, a second input (14) for receiving a feed back signal from the sensor and a second output (36) coupled to the first input for providing an output response signal dependent on the operation of the sensor. The value of the predetermined loop gain is selected so that the output response signal is an undamped oscillation for normal sensor operation. The detector circuit (10) further comprises means (4, 50, 52, 54, 56,. 58, 60) for analysing the output response signal and for detecting normal sensor operation when the output response signal is an undamped oscillation and for detecting short circuit sensor operation when the output response signal is a damped oscillation.

Short circuit detector for sensors

A non-volatile memory cell including a pn diode and a circuit for sensing the logic state of the pn diode such that a logic one state indicates that the diode is in its normal state, while the other logic state is created by fusing the diode for creating a short circuit. The circuit for sensing the logic state of the diode includes a circuit for developing a sense voltage across the diode, a first comparator for comparing the sense voltage with a first reference voltage greater than the normal junction voltage, a second comparator for comparing the sense voltage with a second reference voltage less than the normal junction voltage but greater than the fused junction voltage and a circuit responsive to the outputs of the first and second comparators to provide an output signal which has a first value if the sense voltage is between the first and second reference voltages and a second value if the sense voltage is not between the first and second reference voltages.

Programmable read only memory with output indicating programming state

A driver for a stepper motor including means (Q45, 45, 47, 402) for sampling the current in a motor winding (43) at an instant determined by means (401, 400)for generating a predetermined delay following winding commutation. The sample is compared with winding current by a comparator (403) the output of which is stored at a subsequent instant in a flip-flop (416) to provide an output (42). Current generated within the windings due to rotor motion provide a difference in output when the motor is running or blocked. The invention provides a solution to the problem of motion detection of a stepper motor without recourse to a positional sensor.

Stepper motor controllers

A microcomputer interface arrangement includes a microcomputer having I/O ports coupled to individual interface units. A fault detection circuit detects a fault in an interface unit, interrupts the microcomputer and inverts the input state of the faulty unit without affecting the output states so that the faulty unit can be identified by the microcomputer by reading inputs of the interface units.

Fault indicating microcomputer interface units

A sensor arrangement, particularly suitable for pressure sensors is disclosed, in which differential output signals from a pressure sensor are switched between two amplifiers and fed to a microcomputer where they are stored as two pairs of signals in digital form. The two pairs of signals are combined to cancel amplifier offset voltages.

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Le Grand-Saconnex, Switzerland

Michel Burri