Stmicroelectronics (grenoble 2) Sas

Stmicroelectronics (alps) Sas

E2v Semiconductors

Atmel Grenoble S.a.

Michel Ayraud

Serge Ramet

Vratislav Michal

Philippe Level

Serge Pontarollo

Franck Badets

Sandrine Nicolas

Jean Ravatin

The present disclosure relates to a circuit including an input terminal configured to receive a first signal at a first frequency; a demodulation chain connected to the input terminal and including a low-noise amplifier having an input coupled to the terminal; a controllable variable impedance connected between a first node and a node configured to receive a reference potential, the first node being connected to the input terminal and/or to the amplifier input; and a current source configured to deliver a current at the first frequency to the first node.

Calibration of an RF attenuator

A local oscillator device includes an oscillator module including a first inductive element and a capacitive element coupled in parallel with the inductive element. A frequency divider is coupled to the oscillator module for delivering a local oscillator signal. The local oscillator device includes an autotransformer including the first inductive element and two second inductive elements respectively coupled to the terminals of the first inductive element and to two output terminals of the autotransformer, the output terminals being further coupled to input terminals of the frequency divider.

Low power local oscillator

A circuit includes an amplifier having a first power terminal configured to be coupled to a supply voltage and a second power terminal configured to be coupled to a reference potential. The circuit further includes a first impedance element coupled between a first input terminal of the amplifier and a first output terminal of the amplifier. The circuit additionally includes a second impedance element coupled between the first input terminal and the reference potential. The amplifier is configured to output a first voltage at a second output terminal of the amplifier in response to the supply voltage being greater than an output voltage at the first output terminal of the amplifier. The amplifier is further configured to output a second voltage at the second output terminal of the amplifier in response to the supply voltage being less than the output voltage at the first output terminal of the amplifier.

Voltage detector circuit

The transmission device comprising a transmit stage configured to deliver a transmission signal on an input-output node of an antenna and comprising a power transistor coupled to the input-output node and configured to amplify a signal to be transmitted. The device comprises a receive stage configured to receive a reception signal on the input-output node and comprising an attenuator circuit configured to attenuate the reception signal. The attenuator circuit comprising the power transistor and a control circuit able to place the power transistor in a triode mode.

Attenuator device in a radio frequency transmission stage

An amplification device includes an amplification stage having a transconductance amplification transistor and an output terminal. A biasing circuit is configured to bias in common mode the output terminal to a bias potential obtained on the basis of a voltage present between the gate and the source of the amplification transistor, and to compensate for parasitic variations of the voltage present between the gate and the source of the amplification transistor.

Method and device for self-biased and self-regulated common-mode amplification

An RF amplifier includes a branch with an inductor series-connected with a capacitor between first and second power supply nodes, a junction point between the inductor and capacitor forming an output node. A further branch includes a MOS transistor series-connected with a switch between the output node and the second power supply node. The switch has a control node coupled to receive a first input signal. The MOS transistor has a gate coupled to receive a second input signal. A control circuit applies the power supply voltage as the second input signal when a frequency/phase-modulated signal is applied as the first input signal. The control circuit further applies a variable signal as the second input signal when a radio frequency signal of constant frequency, phase, and amplitude is applied as the first input signal, and in this mode the MOS transistor is constrained to operate as a current source.

Radio frequency signal power amplification circuit

A phase-locked loop double-point modulator may include a frequency divider having a ratio which can be changed by a first modulation signal, and an oscillator, a frequency of which can be changed by a second modulation signal correlated to the first modulation signal. A calibration circuit may be configured, in a calibration mode, to match the gains of the first and second modulation signals based on frequency measurements of the oscillator for two different calibration values of the second modulation signal. The phase-locked double-point modulator may also include an attenuator having a constant ratio greater than 1 and placed in the path of the second modulation signal, and a selector switch configured to be controlled by the calibration circuit to reduce the ratio of the attenuator in the calibration mode.

Double-point modulator with accurate and fast gain calibration

The invention relates to an electronic circuit making it possible to extract a clock signal from an incident binary data sequence arriving at a constant rate. The electronic circuit comprises an oscillator (VCO) with voltage-controlled frequency providing a sinusoidal signal, a circuit (R, Cp, RD, I, I) for extracting the transition edges of the binary sequence producing a brief pulse at each transition, a sampler (MLT) for tapping off the level of the sinusoidal voltage at the instant of the brief pulse, and an integrator (AOP, R, C) for integrating this level in tandem with the successive pulses, the output of the integrator being applied as control voltage to the oscillator with controlled frequency, the output of the oscillator being the desired clock frequency with a slaved phase passing through zero substantially in the middle of the interval between two binary data transitions. Such a circuit is useful in applications for transmitting digital data of serial type, in which the data are received without at the same time receiving a clock signal.

Circuit for clock extraction from a binary data sequence

The invention relates to intraoral radiological dental image sensors, i.e. sensors placed in the mouth of a patient, an X-ray source being located outside the cheek of the patient in order to emit X-rays in the direction of the sensor. According to the invention, the image sensor is attached to a first end of a short electrical cable () of around 5 to 20 cm, a second end of which leaves the patient's mouth when the sensor is in the mouth, the second end carrying a light source () comprising light-emitting diodes that can be digitally modulated as a function of information coming from the sensor, the electrical cable being able to transmit an electrical control signal from the sensor to the diode for modulating the latter.

Intra-oral dental-image sensor system with multiple LEDS

In digital signal demodulation and detection circuits, especially digital radio signal reception and processing circuits, the signals are received in analog form and have to be converted into logic levels. This is done in practice by comparing the level of the signal with its mean level. The mean level is established by an RC lowpass filter which introduces an inconvenient delay into the preparation of the mean level. The mean level of the signal, established by an RC filter is compared and applied to an input B of a comparator COMP, at the level of the analog signal delayed by a phase-shifter and applied to another input A of the comparator. In order that the delay introduced by the phase-shifter into the analog signal may be substantially the same as the delay given to the mean value by the RC circuit, the phase-shifter is made with the same RC circuit and an amplifier mounted so as to set up a phase shift transfer function of the (1&minus;RCp)/(1&plus;RCp) type where p is the Laplace variable.

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Voreppe, France

Michel Ayraud