Cadence Design Systems, Inc.

Michaela Guiney

Sachin Shrivastava

Nikhil Garg

Ankur Chaplot

Yashu Gupta

Sankalp Srivastava

An approach is described for a method, system, and product, the approaching includes identification of an integrated circuit design, identification of sync groups (nets having synchronous voltage levels), generation of a physical design having sync group constraints, and performance of design rule checking on a physical design based on at least transferred sync group information. This provides for performing design rule analysis at least using small minimum spacing requirements then would otherwise be required with prior techniques. In some embodiments, the approach includes a verification process that ensures that synchronous voltage behavior is appropriately associated with members of respective sync groups and cleans up old association data that is no longer relevant/correct.

Method, system, and product for generating and maintaining a physical design for an electronic circuit having sync group constraints for design rule checking

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San Jose, CA, United States of America

Michaela Guiney