Nvidia Corporation

Michael Zhai

Jie Ma

Shuo Zhang

Minto Zheng

Town Zhang

Eric Zhu

Layout techniques for circuits on substrates are disclosed that address the multivariate problem of minimizing routing distances for high-speed I/O pins between circuits while simultaneously providing for the rapid provision of transient power demands to the circuits. The layout techniques may also enable improved thermal management for the circuits.

Staggered dual-side multi-chip interconnect

Layout techniques for chip packages on printed circuit boards are disclosed that address the multivariate problem of minimizing routing distances for high-speed I/O pins between chip packages while simultaneously providing for the rapid provision of transient power demands to the chip packages. The layout techniques may also enable improved thermal management for the chip packages.

Growing community of inventors

Chengdu, China

Michael Zhai