Intel Corporation

Michael Y Chow

Nazar A Zaidi

Elango Ganesan

Sivakumar Makineni

John William Phillips

Sunhyuk Kimn

Suri Babu Medapati

Brian L Hughes

Albert Lo

A method comprising fetching an input from at least one of a plurality of floating-point registers and detecting whether the input includes a token. If the token is detected in the input, checking what mode the processor is in. If the processor is in a first mode, processing the input to render an arithmetic result. If the processor is in a second mode, performing a token specific operation. And producing an output. The present invention also provides a processor comprising a first instruction set engine, a second instruction set engine, and a mode identifier. A plurality of floating-point registers are shared by the first instruction set engine and the second instruction set engine. A floating-point unit is coupled to the floating-point registers. The floating-point unit processes an input responsive to the mode identifier and the input to produce an output.

Method and apparatus for achieving architectural correctness in a multi-mode processor providing floating-point support

A circuit including a multiplexer and a comparator. The multiplexer has one input coupled to a portion of an odd result address bus and another input coupled to a portion of an even result address bus. The control input of the multiplexer is coupled to a least significant bit line of a source address bus. The output of the multiplexer is coupled to one input of the comparator, and the other input is coupled to a portion of the source address bus.

Method and apparatus for data forwarding in a processor having a dual

The invention comprises in several embodiments a pipeline and a method of operating the pipeline. The pipeline comprises first and second stages each having an output. The first stage is located earlier in the pipeline than the second stage. A first isolation device has an input coupled to the output of the first stage. The first isolation device is for storing data received from the first stage. A second isolation device has an input coupled to the output of the second stage. The second isolation device is for storing data received from the second stage. A stall control is for sending a signal to the first and second isolation devices. The signal is to stall the isolation devices. At least one delay element is connected between the stall control and the second isolation device and is to delay receipt of the signal by the second isolation device.

Methods and apparatus to minimize the number of stall latches in a

A microprocessor having a pipelined floating point unit operable to bypass pre-rounded results at clock cycle i and provide the pre-rounded results as an operand for a second instruction at clock cycle i+2. In one embodiment, the pipelined execution unit includes at least a first execution step at clock cycle i, and a second execution step at a clock cycle i+1 and clock cycle i+2. The unit includes a bypass leading from the first execution step at clock cycle i, however, there is no bypass leading from the second execution step at clock cycle i+1. The bypass carries the pre-rounded results from the end of the first execution step to the front end of the pipeline via a latched data path which delays the pre-rounded result one clock cycle.

Apparatus for bypassing intermediate results from a pipelined floating

A method and apparatus for calculating a value of a function f(x) for a given operand x. A memory, such as a Read Only Memory, is used to stored precalculated values for some bits of the function f(x) for a plurality of values of the operand x. Bits of the operand x are used to generate bits for the value of the function f(x) in two ways: 1. to address the ROM to generate some bits for the value of f(x), and 2. as inputs to combinational logic to generate an additional bit of the value of f(x). Because one bit of the value for f(x) is generated external to the ROM, the size of the ROM can be reduced without sacrificing accuracy. Alternatively, the ROM can be used to store an additional bit of precision for values of f(x), thereby increasing the accuracy of these values.

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Cupertino, CA, United States of America

Michael Y Chow