Xilinx, Inc.

Silicon Laboratories Inc.

Cisco Technology, Inc.

Nokia Corporation

Michael Wu

Christopher H Dick

Yan Zhou

Wentao Li

Christoph Emanuel Studer

Joseph R Cavallaro

John M Khoury

Atri Indiresan

Terry Lee Dickey

Nihat E Tunali

Bei Yin

Hendricus De Ruijter

Aslamali A Rafi

Ashish Sirasao

Jorma Lilleberg

Anusankar Elangovan

Ram Gopal Lakshmi Narayanan

Bing Tian

Rangakrishnan Srinivasan

Hai-Jo Tarn

Chengelpet Ramesh

Giovanni Meo

Mitchell Reid

Roberto Mitsuo Kobo

Francesco Barale

Mika Skarp

Kiarash Amiri

Satyaprakash Pareek

Yao Fu

Anup Hosangadi

Petteri Alinikula

Ramesh M Santhanakrishnan

Albert T Gural

Rajesh R A

John Vickroy

Oscar Fernando C Fernandez

Shakeel Ahmed

Tawei Liao

Rajesh Chandra Bansal

Wafo L Tengueu

Güner Arslan

Charles Jeon

Aida Vosoughi

Richard Neff

Rajesh Ra

Disclosed approaches for convolving input feature maps in a neural network include a circuit arrangement circuit that includes memory circuitry and convolution circuitry. The memory circuitry is configured to store K NxN first filters, and C 1x1 second filters, wherein N &#x2265; 1, and 1 < K < C. The convolution circuitry is coupled to the memory circuitry and configured to convolve a three-dimensional input feature map with the K NxN first filters into an intermediate volume having a depth of K, and convolve the intermediate volume with the C 1x1 second filters into an output feature map having a depth of C.

Convolution circuitry

A system and method for one-way ranging is disclosed. The system comprises a transmitter, also referred to as tag, transmitting a packet having a first frequency. The receiver, also referred to as the locator, receives the first frequency and measures the phase at a specific point in time. At a predetermined time, the transmitter switches to a second frequency. This is performed while maintaining phase continuity. The receiver also switches to the second frequency at nearly the same time. The receiver then measures the phase of the second frequency at a second point in time. Based on these two phase measurements, the distance between the transmitter and the receiver may be calculated.

One way ranging synchronization and measurement

A receiver includes a first discrete Fourier transform (DFT) block to perform a first single tone DFT on a positive tone associated with a sounding sequence. A second DFT block performs a second single tone DFT on a negative tone associated with the sounding sequence. A DFT coefficient generation block generates first DFT coefficients based on a nominal frequency of the positive tone and an estimated frequency offset between a transmitter frequency and a receiver frequency. The DFT coefficient generation block generates second DFT coefficients based on a nominal frequency of the negative tone and the estimated frequency offset. Multipliers in the DFT blocks multiply I and Q values of the sounding sequence with the coefficients. Accumulators in the DFT blocks accumulate multiplier outputs. An arctan function receives averaged accumulated values from the first and second DFT blocks and supplies first and second phase values used to calculate fractional timing.

Adjusting DFT coefficients to compensate for frequency offset during a sounding sequence used for fractional time determination

An apparatus comprises an RF receiver for receiving an RF signal. The RF receiver includes front-end circuitry to generate a first down-converted signal, and a plurality of signal detectors to generate a corresponding plurality of detection signals from signals derived from the down-converted signal. The RF receiver further includes a controller to provide at least one control signal to the front-end circuitry based on the plurality of detection signals.

Apparatus for receiver with concurrent detection and associated methods

Method and system relating generally to convolution is disclosed. In such a method, an image patch is selected from input data for a first channel of a plurality of input channels of an input layer. The selected image patch is transformed to obtain a transformed image patch. The transformed image patch is stored. Stored is a plurality of predetermined transformed filter kernels. A stored transformed filter kernel of the plurality of stored predetermined transformed filter kernels is element-wise multiplied by multipliers with the stored transformed image patch for a second channel of the plurality of input channels different from the first channel to obtain a product. The product is inverse transformed to obtain a filtered patch for the image patch.

Method and system for convolution

A mixer in a receiver converts a sounding sequence of alternating ones and zeros to an intermediate frequency signal. A digital mixer converts the intermediate frequency signal to a baseband signal that contains a positive tone and a negative tone. A frequency offset correction circuit generates frequency offset corrections based on frequency offset estimates of the frequency offset between a transmitter of the sounding sequence and the receiver. A frequency adjustment circuit adjusts a frequency of the mixer or the digital mixer to thereby center the positive tone and the negative tone around DC. DFT circuits perform single bin DFTs respectively centered on the positive and negative tones. Phases of the positive and negative tones are calculated based on outputs of the DFT circuits and the phases are used to determine fractional time value associated with a distance measurement between the transmitter and receiver.

Adjusting receiver frequency to compensate for frequency offset during a sounding sequence used for fractional time determination

Lossy tensor compression and decompression circuits compress and decompress tensor elements based on the values of neighboring tensor elements. The lossy compression circuit scales each decompressed tensor element of a tile by a scaling factor that is based on the maximum value that can be represented by the number of bits used to represent a compressed tensor element, and the greatest value and least value of the tensor elements of the tile. The lossy decompression circuit performs the inverse of the lossy compression. The compression circuit and decompression circuit have parallel multiplier circuits and parallel adder circuits to perform the lossy compression and lossy decompression, respectively.

Tensor compression

A system and method for accurately determining a distance between two network devices using a Channel Sounding application is disclosed. The network devices each guarantee a fixed phase relationship between the transmit circuit and the receive circuit. In one embodiment, this is achieved by incorporating the divider within the phase locked loop. The divider may have a reset, such that it can be initialized to a predetermined state. Further, by utilizing a divider disposed within the phase locked loop with a reset, the quadrature signal generator is guaranteed to output clocks for the transmit circuit and the receive circuit that have a constant phase relationship.

Synchronization of receiver and transmitter local oscillators for ranging applications

A method for communicating between a first radio frequency communications device including a first local oscillator and a second radio frequency communications device including a second local oscillator includes receiving a packet using a receiver of the first radio frequency communications device. The method includes detecting an average frequency offset based on sequential samples of the packet. The method includes applying a first adjustment to the first local oscillator to reduce a frequency offset between the first local oscillator and the second local oscillator. The first adjustment is based on the average frequency offset. The method includes, after adjusting the first local oscillator, transmitting a second packet to the second radio frequency communications device by the first radio frequency communications device using the first adjustment and the first local oscillator.

Frequency offset compensation at reflector during frequency compensation interval

A method for operating a radio frequency communications system includes, while operating a first radio frequency communications device in a calibration mode, for each setting of a plurality of settings of a programmable gain amplifier in a receiver of the first radio frequency communications device configured in a zero-intermediate frequency mode of operation, generating an estimate of a DC offset in each of a plurality of digital samples received from an analog circuit path including the programmable gain amplifier, and storing in a corresponding storage element, a compensation value based on the estimate.

DC offset compensation in zero-intermediate frequency mode of a receiver

A system and method for one-way ranging is disclosed. The system comprises a transmitter, also referred to as a tag, transmitting a packet having a sounding sequence. The receiver, also referred to as the locator, receives the sounding sequence. The receiver measures and saves the phase at a plurality of points in time. The sounding sequence has two frequencies, which are additive inverses of one another. A discrete Fourier transform is performed on the plurality of phase measurements to determine the phase of each of the two frequencies. The difference between these two frequencies is related to the time that the packet traveled. Additionally, a calibration of the transmit path and/or receive path may be performed to improve the accuracy of the results.

One way ranging measurement using sounding sequence

Circuits and method for multiplying floating point operands. An exponent adder circuit sums a first exponent and a second exponent and generates an output exponent. A mantissa multiplier circuit multiplies a first mantissa and a second mantissa and generates an output mantissa. A first conversion circuit converts the output exponent and output mantissa into a fixed point number. An accumulator circuit sums contents of an accumulation register and the fixed point number into an accumulated value and stores the accumulated value in the accumulation register.

Multiply and accumulate circuit

A method includes receiving frequency domain (FD) symbols associated with data symbols transmitted in a channel on a frame including a plurality of subcarriers and a plurality of time-slots. An equalization process is performed to the received FD symbols to generate FD equalized symbols. The FD equalized symbols is transformed to time domain (TD) symbols. A demodulation process is performed to the TD symbols to provide estimates of the data symbols.

Generalized frequency division multiplexing (GFDM) multiple-input multiple-output (MIMO) system

A method includes communicating data in a channel. Received symbols for the data correspond to points of a received symbol space respectively. First and second dimensions of the received symbol space correspond to a real part and an imaginary part of the received symbols respectively. A first received symbol for the data is obtained. A first region of the received symbol space for the first received symbol is determined. A first regression model associated with the first region and a first bit of the first received symbol is retrieved from a storage. The first regression model includes a plurality of regressors. A first log-likelihood ratio (LLR) for the first bit of the first received symbol is estimated using the first regression model.

System and method for computing log likelihood ratios

A system includes an integrated circuit configured to communicating data in a channel. A channel matrix for the channel including a plurality of columns is received. A preprocessing step is performed, using a preprocessing unit, to compute a plurality of preprocessed column values corresponding to respective columns. An update step is performed, using an update unit, to update an estimation vector using a plurality of outer-loop iterations of an outer loop. Each outer-loop iteration updates the estimation vector using the plurality of preprocessed column values. An access link process is performed using the estimation vector.

Coordinate descent detector and precoder for multiple-input multiple-output (MIMO) system

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Palo Alto, CA, United States of America

Michael Wu