International Business Machines Corporation

Endicott Interconnect Technologies, Inc.

Michael Wozniak

Voya Rista Markovich

Thomas R Miller

John M Lauffer

Kristen Ann Stauffer

Curtis L Miller

Natalie Barbara Feilchenfeld

James Warren Wilson

William E Wilson

Roy H Magnuson

William John Rudik

John Joseph Konrad

Robert David Sebesta

Christina Marie Boyko

Timothy Leroy Wells

Michael James Cummings

Kenneth J Lubert

Kevin P Unger

Robert J Testa

David Brian Stone

Donald Seton Farquhar

Anilkumar Chinuprasad Bhatt

Ashwinkumar C Bhatt

Brian Eugene Curcio

Subahu Dhirubhai Desai

Norman A Card

Robert Douglas Edwards

Michael Vito Longo

Gerald Andrew Kiballa

Jose A Rios

Kathleen Lorraine Covert

John Christopher Camp

Gary L Newman

Stanley M Albrechta

Paul Gerard Wilkin

John Andrejack

Edward Cibulsky

John Francis Prikazsky

George Frederick Reel

A circuitized substrate in which two conductive layers (e.g., electroplated copper foil) are bonded (e.g., laminated) to an interim dielectric layer. Each of the two foil surfaces which physically bond to the dielectric are smooth (e.g., preferably by chemical processing) and include a thin, organic layer thereon, while the outer surfaces of both foils are also smooth (e.g., preferably also using a chemical processing step). One of these resulting conductive layers may function as a ground or voltage plane while the other may function as a signal plane with a plurality of individual signal lines as part thereof. An electrical assembly and an information handling system utilizing such a circuitized substrate are also provided.

Circuitized substrates utilizing smooth-sided conductive layers as part thereof

A circuitized substrate in which two conductive layers (e.g., electroplated copper foil) are bonded (e.g., laminated) to an interim dielectric layer. Each of the two foil surfaces which physically bond to the dielectric are smooth (e.g., preferably by chemical processing) and include a thin, organic layer thereon, while the outer surfaces of both foils are also smooth (e.g., preferably also using a chemical processing step). One of these resulting conductive layers may function as a ground or voltage plane while the other may function as a signal plane with a plurality of individual signal lines as part thereof. An electrical assembly and an information handling system utilizing such a circuitized substrate are also provided, as is a method of making the substrate.

Method of making circuitized substrates utilizing smooth-sided conductive layers as part thereof

A method of plating a circuit pattern on a substrate to produce a circuitized substrate (e.g., a printed circuit board) in which a dual step metallurgy application process is used in combination with a dual step photo-resist removal process. Thru-holes are also possible, albeit not required.

Plating method for circuitized substrates

A method for creating an impedance controlled printing wiring board, particularly the formation of a structure for high speed printed wiring boards incorporating multiple differential impedance controlled layers. Furthermore, disclosed is the provision of a method for producing an impedance controlled printed circuit wiring board. Also, there is the provision of a method for producing high speed printed wiring boards with multiple differential impedance controlled layers.

Method for producing an electronic package possessing controlled impedance characteristics

A process of removing excess holefill material from a surface of an electronic substrate in which the holefill residue is contacted with a swelling agent followed by planarizing of the surface in the presence of an agent no stronger than a liquid having a pH of about 6 to about 8.

Process of removing holefill residue from a metallic surface of an electronic substrate

A circuitized semiconductor substrate comprising a layer of dielectric material having holes therethrough, a catalyst seed layer lining the walls of the holes along the surface of the dielectric material, and a nickel layer in the openings and a layer of copper above the nickel layer, along with a method for its fabrication. The invention also provides copper-nickel laminate PTH barrels and methods for their fabrication.

Copper plated PTH barrels and methods for fabricating

A high density printed wiring board is prepared by applying an essentially solid material into plated through holes such that the metallized layers within the through hole are unaffected by chemical metal etchants. In this manner, lateral surface metallized layers can exclusively be reduced in thickness by use of said chemical agents. These thinned lateral surface metallized layers are ultimately converted into fine pitch, 25 to 40 microns, circuitry, thereby providing high density boards. Since the through hole wall metallization is unaffected by the etching process, excellent electrical connection between the fine line circuitry is obtained. Various printed wiring board embodiments are also presented.

Fine pitch circuitization with filled plated through holes

A printed circuit board is produced by patterning a resist layer according to a circuit mask that defines desired circuit paths. The resist pattern layer is formed by removing the resist from the board in the desired circuit paths and a conductive material is plated onto the board in the resist voids defined by the circuit mask so that the height of the conductive material relative to the substrate equals or exceeds the height of the resist layer relative to the substrate. A low-reactive solution is applied over the conductive material and removes a surface portion of the conductive material. As the solution removes the conductive layer, it forms a film barrier and the solution composition changes, both of which substantially inhibits any further removal of the conductive material. Next, the film barrier is removed from the board allowing another film barrier to form stimulating the removal of further conductive material. The removal step is repeated until the conductive material is at a desired height relative to the height of the resist layer. The board is then finished using conventional circuit board fabrication techniques.

Method of producing fine-line circuit boards using chemical polishing

A method of forming an electronic structure, including adhesively coupling a plated metallic layer (e.g. a copper layer) of a plated through hole (PTH) to holefill material (e.g., epoxy resin) distributed within the PTH. The adhesive coupling utilizes an adhesion promoter film on the plated metallic layer such that the adhesion promoter film is bonded to the resin. The adhesion promoter film may include a metallic oxide layer such as a layer containing cupric oxide and cuprous oxide, which could be formed from bathing a PTH plated with copper in a solution of sodium chlorite. The adhesion promoter film may alternatively include an organometallic layer such as a layer that includes a chemical complex of metal and an organic corrosion inhibitor. The organometallic layer could be formed from bathing the PTH in a bath of hydrogen peroxide, sulfuric acid, and the organic corrosion inhibitor.

Protection of a plated through hole from chemical attack

A method of making a circuitized substrate having plated through holes free of filler material is provided. The method includes the steps of providing a dielectric substrate having first and second opposite faces. At least one via hole is formed from one face to the other. A first electrically conductive layer is applied onto the top and bottom faces of the dielectric member and onto the side wall of the via. First layers of photoresist are applied to each layer of conductive material and entering at least partially into the via hole. The first layers of photoresist are selectively exposed and developed to remove all of the photoresist, except that photoresist which is disposed in the via holes. Thereafter, a portion of the faces of the metal coatings on the surfaces of dielectric material and any photoresist remaining in the holes extending above the layers of electrically conductive material are removed to form a planar surface thinner than the thickness of the metal in the through hole. Thereafter, a second layer of photoresist material is applied to both the surfaces of the metal on both faces of the dielectric material and exposed to a desired circuit pattern. Thereafter, the second layers of the photoresist material are developed to reveal the underlying metal which is then etched to form a circuit pattern in the metal layer on both faces. Thereafter, the second layers of the remaining photoresist are stripped and also the photoresist remaining in the hole is stripped, thereby to provide a circuitized substrate with plated through holes having an opening extending from the upper face of the substrate to the lower face of the substrate.

Fine pitch circuitization with unfilled plated through holes

Structure for high speed printed wiring boards with multiple differential impedance-controlled layers

The present invention is for a method wherein a printed circuit board can be fabricated in an electroless process with a minimum number of manufacturing steps using mild etchant conditions on an intermediary seed layer to produce low-defect, fine conductive line printed circuit boards.

Selective seed and plate using permanent resist

A method of making a circuitized substrate which may be utilized as a chip carrier structure. The method involves the steps of providing a dielectric member and routing out a preselected portion of the base member to form an aperture. Metallization of the dielectric member and the walls of the aperture then occurs, followed by circuitization of the surfaces of the dielectric member. Direct metallization of the aperture walls eliminates many manufacturing steps previously required to metallize the aperture walls.

Method of making a circuitized substrate with an aperture

Growing community of inventors

Vestal, NY, United States of America

Michael Wozniak