Avago Technologies Wireless IP (Singapore) Pte. Ltd.

Watkins- Johnson Company

Avago Technologies General IP (Singapore) Pte. Ltd.

Agilent Technologies, Inc.

Other

Bae Systems Aerospace Electronics, Inc.

Avago Technologies Wireless IP, Pte. Ltd.

Michael Wendell Vice

Sungkil Hwang

Michael Louis Frank

Charles Edward Dexter

Tiberiu Jamneala

Henrik Morkner

Philip Wilfred Fisher

Xiaohui Li

Lan D Nguyen

Sushil Kumar

A wave shaping circuit reduces slope magnitudes during increasing and decreasing voltage transitions. The wave shaping circuit includes a first switch that receives an input voltage having at least two voltage values where an input voltage transition between the at least two voltage values has a first slope magnitude; an inductor connected in series with the first switch; a second switch connected in a parallel arrangement with the first switch and the inductor; and a capacitor having a first end connected between the inductor and an output port and a second end connected to ground. When the input voltage begins the input voltage transition to a higher voltage value, the first switch turns on and the second switch turns off, such that the inductor limits current flow from the input voltage, decreasing a second slope magnitude of an output voltage transition to less than the first slope magnitude.

Circuit for reducing slope magnitude during increasing and decreasing voltage transitions

A control device provides a supply voltage to an output transistor of a power amplifier. The control device includes a detector encoder, a switch sequencer and a power switch. The detector encoder receives a detection signal indicating a negative peak voltage level of an output signal of the power amplifier, receives a reference signal indicating a critical voltage of the detection signal at which the negative peak voltage level of the output transistor is deemed to be out of voltage with reference to saturation voltage of the output transistor, compares the detection and reference signals, and outputs Boost Request and Recovery Request signals in response. The switch sequencer translates the Boost Request and Recovery Request signals into multiple control bits. The power switch coordinates switching among a no boost voltage and multiple boost voltages based on the control bits, and outputs one of these voltages as the supply voltage.

Device and method for controlling power amplifier

A multipath power amplifier device, configured to operate in a high power mode and a low power mode, includes a high power path, a low power path and an output switch. The high power path includes a high power mode (HPM) amplifying circuit for amplifying an input signal in the high power mode. The low power path includes a low power mode (LPM) amplifying circuit for amplifying the input signal in the low power mode. The output switch is configured to isolate the low power path from the high power path in the high power mode.

Multipath power amplifier device with low power path isolation

A device for controlling operation of a power amplifier includes a detector, a reference signal generator and a controller. The detector is configured to detect a voltage level of an output signal of the power amplifier with respect to a predetermined boost threshold and to generate a corresponding detection signal and a reference signal. The controller is configured to provide a supply voltage to an output transistor of the power amplifier based on a comparison of the detection signal and the reference signal, the supply voltage being a no boost voltage, which is substantially the same as a supply voltage, when the comparison indicates that the voltage level is within the predetermined boost threshold, and the supply voltage being one of multiple boost voltages when the detection signal indicates that the voltage level is beyond the predetermined boost threshold. The controller generates the boost voltages by boosting the supply voltage.

A device for interfacing with multiple different types of network access points includes multiple power amplifiers, a switch and a power detecting circuit. The power amplifiers are configured to provide corresponding signals associated with the different types of network access points, each signal having at least one parameter different than a corresponding parameter in another signal. The switch is configured to select one of the signals to provide an output signal. The power detecting circuit is configured to detect power of the output signal, and includes multiple states corresponding to the multiple different types of network access points. The power detecting circuit outputs a voltage level within the same voltage range for the signals in response to the multiple states corresponding to the different types of network access points with which the signals are associated.

Power detector for multi-band network access

An apparatus for controlling a power amplifier configured to amplify radio frequency (RF) signal includes a detector and a controller. The detector is configured to detect a power level of the RF signal with respect to a predetermined power threshold and to generate a corresponding detection signal. The controller is configured to provide a control voltage to an output transistor of the amplifier based on the detection signal. The control voltage has a low voltage value, which is substantially the same as a value of a supply voltage, when the detection signal indicates that the power level is below the power threshold, and the control voltage has a high voltage value when the detection signal indicates that the power level is above the power threshold. The controller generates the high voltage value by boosting the supply voltage.

Apparatus and method for controlling power amplifier

A device for providing a substantially constant current includes first and second current mirrors. The first current mirror receives a first amount of a first bias current and provides an output current based on the first amount of the first bias current, the first bias current being based on a fixed voltage. The second current mirror receives a second bias current and a second amount of the first bias current, the second bias current being based on a variable voltage. The second bias current and the second amount of the first bias current vary directly with variations in the variable voltage, and the first amount of the first bias current varies inversely with variations in the variable voltage. The output current remains substantially constant based on the variations in first amount of the first bias current, which counteract effects on the output current by variations in the second voltage.

Device for providing substantially constant current in response to varying voltage

A four-state digital attenuator for an RF signal includes a first external terminal adapted to receive a first control voltage; a second external terminal adapted to receive a second control voltage, and a third external terminal connected to a fixed supply voltage. The four-state digital attenuator receives no supply voltages other than the control voltages and the fixed supply voltage connected to the third external terminal. A plurality of series paths are provided from an RF input to an RF output, each of the series paths passing through a node. A plurality of shunt paths are provided from the node to the third external terminal. A driver selectively enables the series paths and shunt paths in response to the first and second control voltages to provide four attenuation levels for an RF signal from the RF input to the RF output.

Four-state digital attenuator having two-bit control interface

An apparatus includes an input-bias node and an internal load. The input-bias node is configured to simultaneously receive an input signal and a bias signal through an input-bias port. The internal load is connected between the input-bias node and multiple output ports, at least one of the output ports outputting an output signal based on the input signal received at the input-bias node.

Apparatus for receiving input and bias signals at common node

An attenuator includes one or more series attenuation branches including one or more series field effect transistors (FETs) each having a gate; one or more shunt attenuation branches including one or more shunt FETs each having a gate; and a bias control FET. The bias control FET receives at its gate a first bias control signal and in response thereto produces at one of its drain and source terminals a second bias control signal. Either the first bias control signal is coupled to the gates of one or more series FETs, and the second bias control signal is coupled to the gates of the one or more shunt FETs; or the first bias control signal is coupled to the gates of the one or more shunt FETs, and the second bias control signal is coupled to the gates of the one or more series FETs.

Attenuator with bias control circuit

A switch-around low noise amplifier (LNA) device includes an input for receiving an input signal; an output for outputting an output signal; an LNA transistor coupled between the input and the output; a bypass switch circuit coupled between the input and the output; a current mirror circuit operatively connected to the LNA transistor to control a current flowing through the LNA transistor; a source follower switch operatively connected to the current mirror circuit to selectively turn on and off the current through the current mirror circuit in response to a mode select signal; and a driver adapted to selectively turn on and off the bypass switch circuit in response to the mode select signal. The LNA transistor receives the input signal at its control terminal, and one of the first and second terminals is directly connected to a supply voltage (e.g., ground).

Switch-around low noise amplifier

An apparatus for setting an attenuation of an attenuator includes a control transistor, which includes a drain connected to a gate of a shunt transistor of the attenuator. A channel resistance of the shunt transistor corresponds to a current density of the control transistor, and the channel resistance of the shunt transistor determines the attenuation of the attenuator. The current density of the control transistor is based at least in part on a control voltage input to the apparatus.

System and method for controlling attenuator

A power down circuit that provides an on-state electrical current to a load circuit that does not depend significantly on power control signal logic levels and that provides a widened off-state control signal voltage range. A power down circuit according to the present teachings includes a switching transistor for providing an electrical current to a load circuit in an on-state and for interrupting the electrical current in an off-state and that includes a circuit for operating the switching transistor in a triode region during the on-state.

Power down circuit

A mixer includes a first field effect transistor (FET) having a gate that receives a first signal of a balanced local oscillator (LO) signal, a first source/drain coupled to a ground voltage, and a second source/drain; and a second FET having a gate that receives a second signal of the balanced LO signal, a first source/drain that floats, and a second source/drain connected to the second source/drain of the first FET to form a mixing node, the second signal being out of phase with the first signal. A diplexer is connected between the mixing node and each of a radio frequency (RF) port and an intermediate frequency (IF) port. A first LO leakage caused by the first FET is substantially canceled by a second LO leakage caused by the second FET at the mixing node.

Mixer with balanced local oscillator signal

A mixing circuit is described in connection with various embodiments.

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El Granada, CA, United States of America

Michael Wendell Vice