Texas Instruments Corporation

Michael W Patrick

Stephen P Sacarisen

Mark A Stambaugh

Kevin C McDonough

Jeffrey D Bellay

Ki S Chang

Gerald R Joyce

Qi Bao

David Flanagan

A microcomputer device contains a CPU with an arithmetic/logic unit and data/address registers on a single semiconductor integrated circuit having on-chip macrocode and microcode storage. A macrocode word is fetched from an on-chip ROM and stored in an instruction register in the CPU, then a sequence of microcode words is fetched from the microcode store based on this macrocode word. A check-code based on some function of all macrocode bits is stored in on-chip ROM upon manufacture. To test a device after fabrication is complete, a test program (resident in ROM or downloaded into on-chip RAM) is executed to address all bytes of macrocode and perform some cummulative function on it via the ALU to see if the same check-code is produced. If so, an output indicates a good unit.

Microcomputer with self-test of macrocode

A microprocessor device used as an adapter for a communications loop of the closed-ring, token-passing, local area network type is disclosed. Each station on the ring has a host processor with a host CPU, a main memory, and a system bus. The microprocessor device therein which operates relatively independently from the host CPU, and which is coupled to the main memory by the system bus, includes a local CPU, a local read/write memory, an on-chip timer, a local bus and a bus arbiter. A transmit/receive controller is connected between the ring and the microprocessor device. This controller is coupled to the local bus to directly access the local read/write memory, also under control of the bus arbiter. The local CPU executes instructions fetched from a ROM accessed by the local bus, so the local CPU instruction fetch, the direct memory access from the transmit/receive controller for transmitting or receiving data frames, and the access from the host CPU for copying transmitted or received message frames, all contend for the local bus. Bus arbitration with appropriate priorities is used to control access to the local bus. The on-chip timer accessed by the local bus provides the time period used to monitor and control the communications protocol.

Microprocessor with integrated CPU, RAM, timer, and bus arbiter for data

A microprocessor device used as an adapter for a communications loop of the closed-ring, token-passing, local area network type. Each station on the ring has a host processor with a host CPU, a main memory, and a system bus. The microprocessor device, operating relatively independent of the host CPU, is coupled to the main memory by the system bus and includes a local CPU, a local read/write memory, an on-chip timer, a local bus and a bus arbiter. A transmit/receive controller is connected between the ring and the microprocessor device. This controller is coupled to the local bus to directly access the local read/write memory, also under control of the bus arbiter. The local CPU executes instructions fetched from a ROM accessed by the local bus, so the local CPU instruction fetch, the direct memory access from the transmit/receive controller for transmitting or receiving data frames, and the access from the host CPU for copying transmitted or received message frames, all contend for the local bus. Bus arbitration with appropriate priorities is used to control access to the local bus. The on-chip timer accessed by the local bus provides the time period used to monitor and control the communications protocol.

Microprocessor with integrated CPU, RAM, timer, bus arbiter data for

A microcomputer device contains a CPU with an arithmetic/logic unit and data/address registers on a single semiconductor integrated circuit having on-chip macrocode and microcode storage. In the normal single-chip operation mode, a macrocode word is fethched from on-chip ROM and stored in an instruction register in the CPU, then a sequence of microcode words is fetched from the microcode store based on this macrocode word. In another mode, such as used for self-test employing a check-code, the device loads macrocode from external into on-chip RAM then executes from RAM to perform the desired routine, switching modes of operation.

Microcomputer with internal selection of on-chip or off-chip access

A microprocessor device with an on-chip integrated auto-loaded timer is used in an adapter for a communications loop of the token-passing local area network type. The network has a number of stations coupled to a closed one-way signal path, and each station has a host processor with a host CPU and memory. The microprocessor device with integrated auto-loaded timer is part of an adapter coupled to the host processor. A message frame to be transmitted is copied into a local read/write memory in the adapter by way of the host system bus and a local bus, under initiation by the host CPU. A transmit-and-receive controller is coupled to the local bus to directly access the local read/write memory; when this station has access to the loop (i.e., receives a free token) the transmit-and-receive controller copies the message frame from the local read/write memory to the outgoing signal path, converting from parallel to serial. When the transmit-and-receive controller receives a message addressed to this station, it converts it from serial to parallel, and copies the message frame into the local read/write memory via the local bus, interrupting the local CPU. The message frame is then copied from the local read/write memory to the main memory.

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Houston, TX, United States of America

Michael W Patrick