Intel Corporation

Michael W Newman

Leonel R Arana

Devendra Natekar

Je-Young Chang

Charan K Gurumurthy

A microelectronic package comprises a chip stack () that includes a substrate (), a first die () over the substrate and a second die () over the first die, a first underfill layer () between the substrate and the first die, and a second underfill layer () between the first die and the second die. The microelectronic package further comprises a fluidic microchannel system () in the chip stack, and the fluidic microchannel system comprises a fluid inlet () and a fluid outlet () connected to each other by a fluidic passage ().

Microelectronic package and method of cooling same

A method, apparatus and system with an electrically conductive through hole via of a composite material with a matrix forming a continuous phase and embedded particles, with a different material property than the matrix, forming a dispersed phase, the resulting composite material having a different material property than the matrix.

Integrated circuit die containing particle-filled through-silicon metal vias with reduced thermal expansion

A method of forming a via having a stress buffer collar, wherein the stress buffer collar can absorb stress resulting from a mismatch in the coefficients of thermal expansion of the surrounding materials. Other embodiments are described and claimed.

Growing community of inventors

Chandler, AZ, United States of America

Michael W Newman