Ncr Corporation

Michael W Meyer

P Keith Muller

Kit M Chow

Alan P Adamson

Weinan William Tseng

Gary Lee Boggs

Gregory DuVall Bruno

Gregory Du Bruno

A method and apparatus for write-back caching in a data storage and processing system has been described. The method comprises the steps of receiving a write request including write data from a compute node in a first I/O node, forwarding the write data from the first I/O node to a second I/O node, and sending an acknowledgment message to the compute node from the second I/O node after the write data is received by the second I/O node. After the data is written into non-volatile storage of the first I/O node, a purge request or command is sent to the second I/O node to purge the write data from the volatile memory of the second I/O node. In one embodiment, the purge request is not sent until the first I/O node receives a second write request, in which case, the purge request is sent in the same interrupt as the write data for the second write request. The processing system comprises a first and a second I/O node, each with means for receiving a write request from the compute node and forwarding that write data to the other I/O node. Each I/O node also comprises a means for sending an acknowledgment message back to the compute node directly, without sending the acknowledgment through the I/O node that sent the write data. The result is an I/O protocol that reduces the number of interrupts required to store data, while still implementing write back caching to improve storage speed and turnaround. The invention also can be described in terms of a program storage device, such as a hard disk, floppy disk, or a CD, which tangibly embodies instructions stored thereon for performing the instructions to practice the invention.

Method and apparatus for write-back caching with minimal interrupts

A distributed service subsystem comprises one or more cabinets containing one or more computer systems, one or more administration consoles for controlling the computer systems in the cabinets, and a network interconnecting the administration consoles and the cabinets. Each of the cabinets includes a cabinet module interface controller (CMIC) coupled to and controlling one or more chassis management boards (CMBs). The CMBs are each adapted to communicate with one or more managed components in the cabinet through a component specific interface.

Distributed service subsystem architecture for distributed network management

A method and apparatus for communicating data in a highly distributed parallel processing computer architecture is described. The method comprises the steps of generating a globally unique ID in the I/O node for a data extent physically stored in the plurality of storage devices, binding the globally unique ID to the data extent, and exporting the globally unique ID to the compute nodes via the interconnect fabric. In one embodiment, the globally unique ID is generated from a globally unique I/O node identifier and a locally unique data extent identifier. A local entry point is generated in the compute node for the data associated with the globally unique ID, thereby presenting the globally unique ID as a device point in the compute node. In one embodiment, the step of exporting the globally unique ID to the compute nodes comprises the step of receiving a message from the compute node comprising a signature securely identifying it to the I/O node, authenticating the source of the message using the signature, and transmitting the globally unique ID comprising data specifying local access rights to the data represented by the globally unique ID from the I/O node to the compute node.

Name service for multinode system segmented into I/O and compute nodes, generating guid at I/O node and exporting guid to compute nodes via interconnect fabric

A highly-scalable parallel processing computer system architecture is described. The parallel processing system comprises a plurality of compute nodes for executing applications, a plurality of I/O nodes, each communicatively coupled to a plurality of storage resources, and an interconnect fabric providing communication between any of the compute nodes and any of the I/O nodes. The interconnect fabric comprises a network for connecting the compute nodes and the I/O nodes, the network comprising a plurality of switch nodes arranged into more than g(log,N) switch node stages, wherein b is a total number of switch node input/output ports, and g(x) indicates a ceiling function providing the smallest integer not less than the argument x, the switch node stages thereby providing a plurality of paths between any network input port and network output port.

Highly-scalable parallel processing computer system architecture

The present invention describes a parallel processing system. The system comprises a plurality of compute nodes for executing applications via a storage application interface having system input/output calls, a plurality of I/O nodes, and a file system implemented in the compute node, for storing information mapping API system input/output calls for the data object with the globally unique identification for the data object. Each I/O node manages a communicatively coupled plurality of storage resources and each has a means for generating a globally unique identification for a data object stored on the storage resource and transmits the globally unique identification and the data object to the compute node via at least one interconnecting fabric providing communication between any of the compute node and any of the I/O nodes.

Growing community of inventors

Encinitas, CA, United States of America

Michael W Meyer