International Business Machines Corporation

Michael Vincent DeBole

Dharmendra S Modha

John Vernon Arthur

Andrew S Cassidy

Jun Sawada

Pallab Datta

Camillo Sassano

Rathinakumar Appuswamy

Kevin Lavern Schultz

Benjamin G Shaw

William Paul Risk

Myron Dale Flickner

Steven Kyle Esser

Hartmut Penner

Brian Taba

Tapan K Nayak

Conflict-free, stall-free, broadcast networks on neural inference chips are provided. In various embodiments, a neural inference chip comprises a plurality of network nodes and a network on chip interconnecting the plurality of network nodes. The network comprises at least one pair of directional paths. The paths of each pair have opposite directions and a common end. The network is configured to accept data at any of the plurality of nodes. The network is configured to propagate data along a first of the pair of directional paths from a source node to the common end of the pair of directional paths and along a second of the pair of directional paths from the common end of the pair of directional paths to one or more destination node.

Conflict-free, stall-free, broadcast network on chip

A device for controlling neural inference processor cores is provided, including a compound instruction set architecture. The device comprises an instruction memory, which comprises a plurality of instructions for controlling a neural inference processor core. Each of the plurality of instructions comprises a control operation. The device further comprises a program counter. The device further comprises at least one loop counter register. The device is adapted to execute the plurality of instructions. Executing the plurality of instructions comprises: reading an instruction from the instruction memory based on a value of the program counter; updating the at least one loop counter register according to the control operation of the instruction; and updating the program counter according to the control operation of the instruction and a value of the at least one loop counter register.

Compound instruction set architecture for a neural inference chip

An apparatus according to one embodiment includes a landing pad having a mating portion configured to mate with a mating feature of a removable element as the removable element approaches the landing pad in a first direction. The apparatus also includes a mount along which the landing pad is movable in a second direction. A lever is positionable between a disengaged position and an engaged position, the lever being coupled to the landing pad for translating the landing pad along the mount in the second direction during movement thereof from the disengaged position toward the engaged position. The first direction is different than the second direction.

Method and apparatus for the alignment and locking of removable elements with a connector

An apparatus includes a coupling rod having a longitudinal axis and disposed within one or more bearing elements that laterally constrain the coupling rod while enabling axial rotation, multiple latching barbs coupled to the coupling rod, rotational force elements that apply a rotational force to the latching barbs in a latching direction and resist rotation of the latching barbs in an unlatching direction. The apparatus may be deployed in a rack system having a rack drawer. The apparatus may also include barb engagement elements for engaging and latching the latching barbs when the rack drawer is moved from an open position to a closed position. Rotation of the coupling rod in the unlatching direction unlatches the latching barbs when the rack drawer is in the closed position and enables a user to open the rack drawer. A method that uses the apparatus is also disclosed herein.

Drawer latching assembly

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Poughkeepsie, NY, United States of America

Michael Vincent DeBole