Texas Instruments Corporation

Michael Thomas Madigan

Larry J Wofford

Thomas N Mathes

Mau Pham

A power equalization circuit in a transformer-based device having a plurality of isolated voltage outputs is provided. The circuit comprises: a threshold detection circuit configured to receive an error signal derived from a selected voltage at one of the isolated voltage outputs, and to determine whether the selected voltage is above a voltage threshold based on the error signal; a timer circuit configured to activate a wait signal after a maximum voltage drift time has expired since the selected voltage rose above the voltage threshold, and to activate a wink signal coincident with the wait signal; an overdrive current source configured to drive an error current to an overdriven value in response to the wait signal; and a commutator circuit connected to a transistor winding associated with the selected isolated voltage output, the commutator being configured to connect a transformer secondary winding to ground in response to the wink signal.

Method and circuit for cross regulation in a power converter

A system and method are disclosed to limit a maximum duty cycle and/or provide a volt-second clamp for a pulse-width modulated (PWM) signal. Depending on the circuit topology, this approach can limit the absolute duty cycle or operate as a volt-second clamp in which the duty cycle is limited as a function of a variable input control voltage, such as a line voltage. The duty cycle can be selectively programmed by setting one or more external reference components, such as one or more respective resistors. Additionally, through component matching, desired clamping can be achieved with a high level of accuracy.

System and method to limit maximum duty cycle and/or provide a maximum volt-second clamp

A power supply pulse width modulation (PWM) control system uses peak current program mode (CPM) control for large duty ratios with a smooth transition to voltage mode control at small duty ratios down to zero duty ratio. The PWM control system implements the latch function in an analog, circuit in contrast with commonly employed digital solutions, further resulting in low delay times since it does not have logic and set-up delays that are associated with latches.

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Cary, NC, United States of America

Michael Thomas Madigan