Infineon Technologies Ag

Ebm-papst St. Georgen Gmbh & Co Kg

Michael Stadler

Thomas Bemmerl

Thomas Stoek

Paul Armand Asentista Calo

Chooi Mei Chong

Peter Ragg

Mohd Hasrul Zulkifli

Edward Myers

Markus Dielacher

Martin Flatscher

Wolfgang Laufer

Robert Lobnik

Athanasios Kollias

Thomas Gigl

Fong Lim

Alessandra Fusco

Mei Qi Tay

Tien Heng Lem

Ilie Poenaru

Tek Keong Gan

Ser Yee Keh

Mario Alejandro Zotes

An electronic device and method is disclosed. In one example, the electronic device includes a solderable surface and at least one surface opening arranged in the solderable surface. The electronic device further includes an encapsulation material, encapsulating at least one electronic component of the electronic device, and at least one vent opening arranged in an area of the surface opening and extending through the encapsulation material.

Electronic devices including vent openings and associated methods

A method of soldering a semiconductor chip to a chip carrier includes arranging a solder deposit including solder and solder flux between a contact portion of the carrier and a contact portion of a chip pad arranged at a surface of the semiconductor chip. Arranging a dielectric layer at the surface of the semiconductor chip. The dielectric layer includes an opening within which the contact portion of the chip pad is exposed. The dielectric layer further includes arranging a solder flux outgassing trench separate from the opening and intersecting with the solder deposit. The method further includes melting the solder deposit which causes liquid solder to be moved over the solder flux outgassing trench for extraction of flux gas.

Method of soldering a semiconductor chip to a chip carrier

A method for producing a semiconductor arrangement includes applying a metallization layer on an upper main side of a lower semiconductor chip, structuring the metallization layer, and fastening an upper semiconductor chip on the upper main side of the lower semiconductor chip by a bonding material, wherein the metallization layer is structured such that the metallization layer has an increased roughness along a contour of the upper semiconductor chip in comparison with the rest of the metallization layer, wherein wetting of the upper main side of the lower semiconductor chip by the bonding material is limited by a structure in the metallization layer to a region below the upper semiconductor chip.

Semiconductor arrangement and method for producing a semiconductor arrangement

A semiconductor package includes a semiconductor chip, an encapsulation body encapsulating the semiconductor chip, and a metal sheet having a first sheet surface and an opposite second sheet surface. The first sheet surface is exposed at the encapsulation body. The semiconductor chip is arranged at the second sheet surface. The first sheet surface has a pattern having first subdivisions having a first average roughness and second subdivisions having a second average roughness. The first average roughness is greater than the second average roughness.

Semiconductor package, metal sheet for use in a semiconductor package, and method for producing a semiconductor package

A semiconductor device includes: a carrier having a die pad and a contact; a semiconductor die having opposing first and second main sides and being attached to the die pad by a first solder joint such that the second main side faces the die pad; and a contact clip having a first contact region and a second contact region. The first contact is attached to the first main side by a second solder joint. The second contact region is attached to the contact by a third solder joint. The first contact region has a convex shape facing towards the first main side such that a distance between the first main side and the first contact region increases from a base of the convex shape towards an edge of the first contact region. The base runs along a line that is substantially perpendicular to a longitudinal axis of the contact clip.

Semiconductor device having a contact clip with a contact region having a convex shape and method for fabricating thereof

A clip, a semiconductor package, and a method are disclosed. In one example the clip includes a die attach portion having a first main face and a second main face opposite to the first main face, and at least one through-hole extending between the first and second main faces and including a curved transition from an inner wall of the at least one through-hole to the first main face.

Semiconductor package and clip with a die attach

A semiconductor chip includes a chip pad arranged at a surface of the semiconductor chip. A dielectric layer is arranged at the surface of the semiconductor chip. The dielectric layer has an opening within which a contact portion of the chip pad is exposed, the opening having at least one straight side. The dielectric layer includes a solder flux outgassing trench arranged separate from and in the vicinity of the at least one straight side of the opening and that extends laterally beyond sides of the opening adjoining the straight side.

Chip with chip pad and associated solder flux outgassing trench

A semiconductor device includes a semiconductor die attached to a substrate and a metal clip attached to a side of the semiconductor die facing away from the substrate by a soldered joint. The metal clip has a plurality of slots dimensioned so as to take up at least 10% of a solder paste that reflowed to form the soldered joint. Corresponding methods of production are also described.

Semiconductor device having a metal clip with a solder volume balancing reservoir

A semiconductor device includes a semiconductor die attached to a substrate and a metal clip attached to a side of the semiconductor die facing away from the substrate by a soldered joint. The metal clip has a plurality of slots dimensioned so as to take up at least 10% of a solder paste reflowed to form the soldered joint. Corresponding methods of production are also described.

Metal clip with solder volume balancing reservoir

A semiconductor arrangement includes a lower semiconductor chip, an upper semiconductor chip arranged over an upper main side of the lower semiconductor chip, a metallization layer arranged on the upper main side of the lower semiconductor chip, and a bonding material which fastens the upper semiconductor chip on the lower semiconductor chip. The metallization layer includes a structure with increased roughness in comparison with the rest of the metallization layer, the structure being arranged along a contour of the upper semiconductor chip.

An electrical interconnect structure includes a bond pad having a substantially planar bonding surface, and a solder enhancing structure that is disposed on the bonding surface and includes a plurality of raised spokes that are each elevated from the bonding surface. Each of the raised spokes has a lower wettability relative to a liquefied solder material than the bonding surface. Each of the raised spokes extend radially outward from a center of the solder enhancing structure.

Electrical interconnect structure with radial spokes for improved solder void control

Semiconductor device and method for fabricating a semiconductor device

A fan has an impeller () that is equipped with blades (). The blades are configured so that the blade loading of individual blades differs during operation. As a result of this variable blade loading, the frequencies associated with the blade-passing noise (BPF) of the fan can be distributed over a broader frequency spectrum, and thus have a less obtrusive effect.

Fan comprising an impeller with blades

An apparatus, having a transmitted light power/energy monitor configured to monitor transmitted power/energy of light transmitted by a light source, and a controller configured to determine and control a maximum transmit light time based on the transmitted light power/energy and a transmit light power/energy threshold based on time.

Adaptive transmit light control

An axial- or diagonal-fan has a fan wheel () having profiled rotor blades (). Each blade has a suction or intake side (), a portion located forward, with respect to the rotation direction (), and having a leading edge (), and a portion located rearward, with respect to the rotation direction (), and having a trailing edge (). Between said portions, on the intake side () of the respective rotor blade (), a trip or separation edge () is provided, said trip edge having an S-shaped contour in a meridian cross-section.

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Munich, Germany

Michael Stadler