University of Minnesota

Michael Salonik Resch

Jian-Ping Wang

Thomas Peterson

Ulya R Karpuzcu

Zhengyang Zhao

Sachin S Sapatnekar

Masoud Zabihi

Zamshed I Chowdhury

A logic-memory cell includes a spin-orbit torque device having first, second and third terminals configured such that current between the second and third terminals is capable of changing a resistance between the first and second terminals. In the cell, a first transistor is connected between a logic connection line and the first terminal of the spin-orbit torque device and a second transistor is connected between the logic connection line and the third terminal of the spin-orbit torque device.

Computational random access memory (CRAM) based on spin-orbit torque devices

Growing community of inventors

Minneapolis, MN, United States of America

Michael Salonik Resch