Memc Electronic Materials, Inc.

Michael S Wisnieski

Ankur H Desai

David I Golland

Harold E Hall, Jr

Vepa Krishna

Troy W Adcock

Lois Illig

Apparatus for determining the flatness of a generally circular polishing pad through direct measurement of the pad for use in maintaining the flatness of the pad and the flatness of surfaces of articles polished on the polishing pad of a polisher. The apparatus includes a measuring device, a frame mounting the measuring device being capable of measuring a distance between an upper surface of the polishing pad and a reference plane at plural locations along the polishing pad. The apparatus further includes a controller for controlling the measuring device. The controller is configured to indicate whether the flatness of the pad falls outside a predetermined specification.

Method and apparatus for controlling flatness of polished semiconductor

A method of rough polishing a semiconductor wafer to reduce roughness on a surface of the wafer prior to finish polishing the wafer by applying a polishing solution to a polishing material, contacting the polishing material and the polishing solution with the surface of the wafer as the wafer moves relative to the polishing material to reduce low frequency surface roughness of the wafer, applying a second polishing solution to the polishing material, and contacting the polishing material and the second polishing solution with the surface of the wafer as the wafer moves relative to the polishing material to further reduce the low frequency surface roughness, wherein the wafer has an average surface roughness not greater than 1.0 nm Ra, as measured on a 1 mm.times.1 mm scan with an optical interferometer, after being rough polished.

Method of rough polishing semiconductor wafers to reduce surface

A semiconductor wafer polisher of the present invention for polishing at least one semiconductor wafer to flatten a first face of the wafer and reduce the thickness of the wafer from an initial thickness t.sub.1 to a predetermined final thickness t.sub.2. The polisher comprises a first surface including a polishing surface portion, a second surface including a second surface portion, and a wafer carrier for holding the semiconductor wafer between the polishing surface portion and the second surface portion. At least one polishing limiter is between the first and second surfaces for limiting the reduction in thickness of the wafer. The wafer carrier and polishing limiter are integrally formed such that the polishing limiter and wafer carrier constitute a single unitary piece. The polishing limiter has at least one rubbing surface adapted for rubbing against one of the first and second surfaces and is sized and configured such that the rubbing surface is spaced axially from the one of the first and second surfaces when the semiconductor wafer has the thickness t.sub.1 and such that the rubbing surface rubs against the one of the first and second surfaces and the polishing limiter extends from the second surface to the first surface when the semiconductor wafer has the thickness t.sub.2. The polishing limiter has a greater resistance to polishing than that of the semiconductor wafer such that the polishing limiter prevents the polishing surface and the second surface portion from further moving axially toward each other when the polishing limiter extends from the second surface to the first surface to prevent the wafer from being reduced in thickness beyond the thickness t.sub.2.

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O'Fallon, MO, United States of America

Michael S Wisnieski