Intergraph Corporation

3dlabs Inc., Ltd.

Michael S Farmer

James Leroy Deming

Steven James Heinrich

Clifford A Whitmore

Stewart G Carlton

Matt E Buckelew

Mark Allen Mosley

Dale L Kirkland

Gary Shelton

A device for storing pixel information for displaying a graphics image on a display includes a frame buffer and a processor. The information includes an intensity value and a value associated with each of a plurality of additional planes for each pixel. The frame buffer memory has a series of consecutive addresses for storing information to be output to the display. The frame buffer may be subdivided into a plurality of blocks, where each block corresponds to a region of the display having a plurality of contiguous pixels. The processor places the pixel information within the frame buffer memory so that in a given block there are placed at a first collection of consecutive addresses the intensity values for each of the pixels in the block.

High speed video frame buffer

A method of synchronizing, at a system frame display rate, a first set of frames displayed by a first monitor with a second set of frames by a second monitor, utilizes frame production rates of the two sets of frames to set the system frame display rate. More particularly, the first set of frames are produced at a first frame production rate by a first graphics engine, and the second set of frames are produced at a second frame production rate by a second graphics engine. The first frame production rate and second frame production rate first are compared to determine which frame production rate is slower. The system frame display rate then is set to be no greater than the slower of the two frame production rates.

Multiple display synchronization apparatus and method

This invention relates to providing high-speed video graphics through use of single ported memory chips on the video card.

High-speed video frame buffer using single port memory chips

Growing community of inventors

Huntsville, AL, United States of America

Michael S Farmer