Infineon Technologies Ag

Infineon Technologies Austria Ag

Infineon Ag

Michael Rueb

Armin Willmeroth

Helmut Strack

Gerald Deboy

Dirk Ahlers

Hans Martin Weber

Franz Hirler

Anton Mauder

Carolin Tolksdorf

Roland Rupp

Michael Treu

Markus Schmitt

Holger Kapels

Hans-Joachim Schulze

Thoralf Kautzsch

Gerhard Schmidt

Uwe Wahl

Rudolf Elpelt

Winfried Kaindl

Thomas Detzel

A semiconductor device has a cell field with drift zones of a first type of conductivity and charge carrier compensation zones of a second type of conductivity complementary to the first type. An edge region which surrounds the cell field has a higher blocking strength than the cell field, the edge region having a near-surface area which is undoped to more weakly doped than the drift zones, and beneath the near-surface area at least one buried, vertically extending complementarily doped zone is positioned.

Semiconductor device with a charge carrier compensation structure and method for the production of a semiconductor device

A semiconductor device, in which a first trench section is produced proceeding from a surface of a semiconductor body into the semiconductor body. A semiconductor layer is produced above the surface and above the first trench section. A further trench section is produced in the semiconductor layer in such a way that the first trench section and the further trench section form a continuous trench structure.

Method for fabricating a trench structure, and a semiconductor arrangement comprising a trench structure

A semiconductor device with a charge carrier compensation structure in a semiconductor body and to a method for its production. The semiconductor body includes drift zones of a first conduction type and charge compensation zones of a second conduction type complementing the first conduction type. The drift zones include a semiconductor material applied in epitaxial growth zones, wherein the epitaxial growth zones include an epitaxially grown semiconductor material which is non-doped to lightly doped. Towards the substrate, the epitaxial growth zones are provided with a first conduction type incorporated by ion implantation over the entire surface and with selectively introduced doping material zones of a second, complementary conduction type. Towards the front side, the epitaxial growth zones are provided with a second, complementary conduction type incorporated by ion implantation over the entire surface and with selectively introduced doping material zones of the first conduction type.

Semiconductor device with a charge carrier compensation structure in a semiconductor body and method for its production

An integrated circuit device includes a semiconductor body fitted with a first electrode and a second electrode on opposite surfaces. A control electrode on an insulating layer controls channel regions of body zones for a current flow between the two electrodes. A drift section adjoining the channel regions comprises drift zones and charge compensation zones. A part of the charge compensation zones includes conductively connected charge compensation zones electrically connected to the first electrode. Another part includes nearly-floating charge compensation zones, so that an increased control electrode surface has a monolithically integrated additional capacitance Cin a cell region of the semiconductor device.

Integrated circuit device and method for its production

A semiconductor component is proposed which has a semiconductor body having a first semiconductor zone of the first conduction type, at least one first rectifying junction with respect to the first semiconductor zone, at least one second rectifying junction with respect to the first semiconductor zone, wherein the three rectifying junctions each have a barrier height of different magnitude.

Semiconductor component having rectifying junctions of different magnitudes and method for producing the same

A semiconductor component includes a semiconductor body having an edge with an edge zone of a first conductivity type. Charge compensation regions of a second conductivity type are embedded into the edge zone, with the charge compensation regions extending from a top side of the semiconductor component vertically into the semiconductor body. For the number Nof charge carriers present in a volume Vbetween two charge compensation regions that are adjacent in a direction perpendicular to the edge, and for the number Nof charge carriers present in a volume Vbetween two charge compensation regions that are adjacent in a direction parallel to the edge, N&#x3e;Nholds true.

Semiconductor component and method for producing it

A power semiconductor component includes a drift zone in a semiconductor body, a component junction and a compensation zone. The component junction is disposed between the drift zone and a further component zone, which is configured such that when a blocking voltage is applied to the component junction, a space charge zone forms extending generally in a first direction in the drift zone. The compensation zone is disposed adjacent to the drift zone in a second direction and includes at least one high-dielectric material having a temperature-dependent dielectric constant. The temperature dependence of the compensation zone varies in the second direction.

Power semiconductor component with a drift zone and a high-dielectric compensation zone and method for producing a compensation zone

A lateral MISFET having a semiconductor body has a doped semiconductor substrate of a first conduction type and an epitaxial layer of a second conduction type, which is complementary to the first conduction type, the epitaxial layer being provided on the semiconductor substrate. This MISFET has, on the top side of the semiconductor body, a drain, a source, and a gate electrode with gate insulator. A semiconductor zone of the first conduction type is embedded in the epitaxial layer in a manner adjoining the gate insulator, a drift zone of the second conduction type being arranged between the semiconductor zone and the drain electrode in the epitaxial layer. The drift zone has pillar-type regions which are arranged in rows and columns and whose boundary layers have a metal layer which in each case forms a Schottky contact with the material of the drift zone.

Lateral MISFET and method for fabricating it

A method for manufacturing a semiconductor device. The method includes providing a semiconductor body of a conductivity type, wherein the semiconductor body comprises a first surface. At least one buried region of a second conductivity type is formed in the semiconductor body and at least a surface region of the second conductivity type is formed at the first surface of the semiconductor body, wherein the buried region and the surface region are formed such that they are spaced apart from each other. The buried region is formed by deep implantation of a first dopant of the second conductivity type.

Semiconductor device and method for forming same

A process for producing structures in a semiconductor zone, has the steps of a) producing a trench () in the semiconductor zone (), b) filling the trench with a photoresist (), and c) exposing the photoresist () using ion beams (), d) developing the photoresist (). The energy density and ion dose for the ion beams () are selected in such a way that the photoresist () is only chemically changed at defined depths, so as to produce two regions, in the first region () of which the photoresist has been chemically changed at the defined depths by the ion beams (), and in the second region of which the photoresist has been left chemically unchanged, so that during the developing step the photoresist is removed in precisely one of the two regions.

Process for patterning capacitor structures in semiconductor trenches

A power transistor has a source region, a drain region, a semiconductor body arranged between the source region and the drain region, and a plurality of nanotubes. The plurality of nanotubes are connected in parallel and disposed in the semiconductor body such that the plurality of nanotubes are electrically insulated from the semiconductor body and electrically connect the source and drain regions of the transistor. The power transistor also includes at least one diode formed in the semiconductor body. A portion of the at least one diode formed in the semiconductor body is configured to act as a gate electrode for the transistor.

Power transistor

An integrated semiconductor circuit having a first and a second portion of a substrate, in which a power semiconductor circuit structure and a logic circuit structure are respectively formed. The metallization having a power metal layer and an in relative terms thinner logic metal layer, the two metal layers being located directly above one another in this order, without an intermetal dielectric between them, only in the first portion above the power semiconductor circuit structure, and an uninterrupted conductive barrier layer being located at least between the power metal layer and the intermediate oxide layer and also between the power metal layer and the contact regions and electrode portions of the power semiconductor circuit structure which it contact-connects, and to a method for fabricating it.

Integrated semiconductor circuit having a logic and power metallization without intermetal dielectric

The invention relates to a method for doping a semiconductor body (), in which an n-type doping is introduced into the semiconductor body, which is initially p-doped, for example, by means of ion irradiation preferably with protons, which n-type doping is then cancelled by the action of a laser beam () in specific regions () so that the original p-type doping is present in said regions ().

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Faak am See, Austria

Michael Rueb