International Business Machines Corporation

Michael R Poponiak

Robert Otto Schwenker

Cheng Tzong Horng

Hans S Rupprecht

San-Mei Ku

John L Deines

Paul Johannes Burkhardt

Klaus D Beyer

Paul J Tsang

Subhash Balakrishna Kulkarni

Robert Charles Dockerty

Shakir A Abbas

Gobinda Das

Theodore William Kwap

Tsu-Hsing Yeh

Arun K Gaind

Daniel Francis O'Kane

Charles A Pillus

Walter Irving Lisle

Louis Gulitz

In the fabrication of integrated circuits, a method is provided for forming dielectrically isolated regions in a semiconductor substrate comprising forming over the semiconductor substrate surface an electrically insulating layer of dielectric material having a plurality of openings therethrough and etching to form recesses in the semiconductor substrate exposed in the openings. Then, aluminum is deposited over the substrate so that an aluminum layer is formed on said layer of dielectric material as well as in said recesses. Next, the aluminum in the recesses is selectively anodized to form aluminum oxide, and the remaining aluminum on said layer of dielectric material is removed either by selectively etching away the aluminum layer or by a 'lift-off' technique wherein the insulating layer of dielectric material under the aluminum is etched away thereby 'lifting-off' and removing the aluminum.

Method for forming aluminum oxide dielectric isolation in integrated

A reduced pressure epitaxial deposition method is disclosed to maximize performance and leakage limited yield of devices formed in the epitaxial layer. The method includes specified prebake and deposition conditions designed to minimize arsenic (buried subcollector) and boron (buried isolation) autodoping effects when pressures below one atmosphere are selected in accordance with the subcollector-to-isolation area ratio.

Optimum reduced pressure epitaxial growth process to prevent autodoping

A method for device fabrication utilizing a self-aligned process. A combination of advanced semiconductor processing techniques including Deep Dielectric Isolation by reactive-ion etching, etching and refilling, planarizing with oxides and resists, and differential thermal oxidation are used to form devices having small vertical as well as horizontal dimensions. The device region is surrounded by a deep oxide trench which has nearly vertical sidewalls which extend from the epitaxial silicon surface through the N+ subcollector region into the P substrate. The width of the deep trench is about 2 .mu.m to 3 .mu.m. A shallow oxide trench extends from the epitaxial silicon surface to the upper portion of the N+ subcollector and separates the base and collector contact. The surface of the isolation regions and the silicon where the transistor is formed is coplanar. As shown in FIG. 1, the fabricated bipolar transistor has a mesa-type structure. The transistor base dimension is only slightly larger than the emitter. This small base area results in a low collector-base capacitance which is a very important parameter in ultra-high performance integrated circuit devices. Contact to the transistor base in the disclosed structure is achieved by a thick heavily boron doped polysilicon layer which is formed by an etch and refill process and which surrounds the emitter and makes lateral contact to the active base.

Process for fabricating a self-aligned micrometer bipolar transistor

A method for device fabrication disclosed is a self-aligned process. The device formed has small vertical as well as horizontal dimensions. The device region is surrounded by a deep oxide trench which has nearly vertical sidewalls. The deep trench extends from the epitaxial silicon surface through N+ subcollector region into the P substrate. The width of the deep trench is about 2 .mu.m to 3.0 .mu.m. A shallow oxide trench extending from the epitaxial silicon surface to the upper portion of the N+ subcollector separates the base and collector contact. The surface of the isolation regions and the silicon where the transistor is formed is coplanar. As shown in FIG. 1, the fabricated bipolar transistor has a mesa-type structure. The transistor base dimension is only slightly larger than the emitter. This small base area results in low collector-base capacitance which is a very important parameter in ultra-high performance integrated circuit devices. Contact to the transistor base in the disclosed structure is achieved by a thick heavily boron doped polysilicon layer which surrounds the emitter and makes lateral contact to the active base.

Self-aligned micrometer bipolar transistor device and process

Electrically active defects, i.e., current-carrying defects or leakage paths in silicon crystals, are detected by an anodization process. The process selectively etches the crystal surface only where the electrically active defects are located when the anodization parameters are properly selected. Selected surface portions of the silicon structure are exposed to a hydrofluoric acid solution which is maintained at a negative potential with respect to the silicon structure. When the potential difference is set to a proper value, etch pits are formed in the surface of the silicon only at those locations overlying electrically active defects which impact device yield. The defects are observed and counted to provide a basis to predict yield of desired semi-conductor devices to be formed later in the silicon structure.

Anodic etching method for the detection of electrically active defects

A method and resulting structure for a relative humidity monitor which can be built into an integrated circuit chip. A small area on a silicon chip is made porous by anodic etching. This region is then oxidized and a metal counter electrode is deposited over part of the porous area. The surface area in the dielectric under the counter electrode is very high and because of the openness of the structure, ambient moisture can quickly diffuse into the dielectric under the electrode and adsorb onto the silicon dioxide surface. Changes in ambient humidity will then be reflected by measurable changes in capacitance or conductance of the device.

Method for manufacture of a moisture sensor

A method for fabricating bipolar semiconductor devices of large scale integration in which the formation of pipes, which result in shorts or leakages between two conductivity types of the semiconductor devices, is minimized. Prior to forming the emitters in the bipolar transistors, nucleation sites for crystallographic defects such as dislocation loops are formed in the base region near its surface. The emitters are then formed in base regions containing the nucleation sites and the sites are converted into electrically harmless dislocation loops during diffusion of the emitter impurity. Preferably, the nucleation sites are formed by implanting non-doping impurities, such as helium, neon, argon, krypton, xenon, silicon, and oxygen.

Semiconductor fabrication method for improved device yield by minimizing

A real time monitoring and control system for single or multi-fired combustion systems which permits adjustment of the air fuel ratio in the system for optimized efficiency and minimized pollution content in the exhaust gas, while providing safety control of the combustion process. The system includes a high sensitivity light sensor which is utilized to monitor the combustion flame and provide an electrical output proportional to flame temperature, that is utilized to control the air fuel ratio of the system. The wavelength sensitivity of the sensor is capable of selection, for example by selection of sensor type and/or use of appropriate filters, to monitor a predetermined range or region of the flame emission spectrum in order to enable correlation of the intensity of the emission spectrum of the type of fuel being utilized, i.e., oil or natural gas, with temperature and combustion efficiency. A sensor having a defined field of view is utilized and means are provided to sample signals from selected portions of the field of view of the sensor to enable temperature monitoring of a multi-flame system. The output of the sensor is provided to a computer which in turn is electrically connected to control a valve that individually adjusts the air fuel ratio of each flame of the system to permit real time adjustment of the combustion process. The system enables control of combustion at or near optimum burning efficiency, i.e., in the range of 1/2 to 1 percent excess oxygen.

Combustion monitoring and control system

Porous silicon dioxide moisture sensor and method for manufacture of a

A method for forming monocrystalline silicon carbide on a silicon substrate by converting a portion of the monocrystalline silicon substrate into a porous silicon substance by anodic treatment carried out in an aqueous solution of hydrofluoric acid, heating the resultant substrate to a temperature in the range of 1050.degree. C to 1250.degree. C in an atmosphere that includes a hydrocarbon gas for a time sufficient to react the porous silicon and the gas, thereby forming a layer of monocrystalline silicon carbide on the silicon substrate.

Process for forming monocrystalline silicon carbide on silicon substrates

In integrated circuit fabrication, a method is provided for simultaneously forming two regions of the same conductivity-type such as the base and isolation regions. In one embodiment, an epitaxial layer of one conductivity-type is formed on a substrate of opposite conductivity-type, after which dopant ions of the opposite conductivity-type are introduced into the epitaxial surface areas which are to provide the base and isolation regions, and in addition, the isolation regions are bombarded with non-dopant ions having a maximum atomic number of two, e.g., hydrogen or helium ion while the base regions are appropriately masked and remain umbombarded, said bombardment is carried out at temperatures below 300.degree. C, preferably room temperature. The bombardment is preferably carried out so that the non-dopant ions are implanted primarily in regions below the isolation regions. Next, the wafer is heated at a temperature at a range of from 600.degree. - 900.degree. C which is substantially below normal drive-in diffusion temperatures for unbombarded doped regions. The heating to be maintained for a period sufficient to drive-in diffuse the bombarded isolation regions through the epitaxial layer into contact with the substrate but is insufficient to drive-in the unbombarded base regions to such a depth.

Method of proton-enhanced diffusion for simultaneously forming

A process for forming holes with precisely controlled dimension and position in monocrystalline silicon wafers wherein the holes are fabricated with vertical sides. In the preferred process, both sides of the silicon body are masked, opposite registered openings made in the masking layers, an impurity introduced through the openings into the body forming low resistivity regions, the body anodically etched through the openings until a porous silicon region is formed completely through the body, and subsequently removing the resultant porous silicon region with a silicon etchant.

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Newburgh, NY, United States of America

Michael R Poponiak