Viasat, Inc.

U.S. Monolithics, L.l.c.

Michael R Lyons

Kenneth V Buer

Noel A Lopez

Qiang Richard Chen

David R Laidig

Dean Lawrence Cook

Richard Scott Torkington

Christopher D Grondahl

Dave Laidig

Scarlet Daoud

Ramanamurthy V Darapu

Douglas J Mathews

Edwin Jack Stanfield

Shih Peng Sun

Algirdas Navickas

Brandon C Drake

Gary P English

John Martin Peitz

Mark S Berkheimer

Richard S Torkington

A packaged semiconductor chip includes a semiconductor sub strate having formed thereon: radio-frequency (RF) input and output contact pads, DC contact pads, and first and second amplifier stages. An input of the first amplifier stage is coupled with the RF input contact pad. An input and an output of the second amplifier stage are respectively coupled to an output of the first amplifier stage and the RF output contact pad. The DC contact pads and the input of the first amplifier stages are connected via an input bias coupling path. The outputs of the amplifier stages are connected via an output bias coupling path. The chip further includes a lead frame having RF input and output pins electrically coupled to the RF input and output contact pads, and input bias pins electrically coupled to the DC contact pad.

Modularized power amplifier devices and architectures

Systems, devices, and methods for determining and establishing frequency-dependent gain compensation in wide bandwidth communication systems are disclosed. Variable frequency-dependent gain compensation circuits, or variable equalizers, have settings that configure them to establish discrete frequency-dependent gain compensation. The frequency-dependent gain compensation can include various types and levels of gain slope and/or ripple. The settings of the variable equalizers can be set by control signals established a control circuit in response to signals from an external computer. The variable equalizers are coupled to other circuits or devices and the frequency-dependent gain of the combined circuit are measured. The settings of the variable equalizer are then changed to establish an optimal frequency-dependent gain profile or frequency-dependent gain that is closest to a predetermined frequency-dependent target gain profile. The settings can then be saved in a memory or register.

Equalization of frequency-dependent gain

A nested multi-stage polyphase filter can comprise: a first filter stage and a second filter stage. The first filter stage can be connected to the second filter stage via first through fourth intermediate connections. The first filter stage and the second filter stage can be laid out in a nested-ring layout. The first through fourth intermediate connections can be laid out so as to not cross over each other.

Nested multi-stage polyphase filter

A MMIC package is disclosed comprising: a leadframe based overmolded package, a die positioned within the overmolded package; and a partial waveguide interface, wherein the partial waveguide interface is integral with the overmolded package facilitating low cost and reliable assembly. Also disclosed is an overmolded package where the die sits on a metal portion exposed on the bottom of the package and the package is configured for attachment to a chassis of a transceiver such that heat from the die is easily dissipated to the chassis with a direct thermal path. The disclosure facilitates parallel assembly of MMIC packages and use of pick and place/surface mounting technology for attaching the MMIC packages to the chassis of transceivers. This facilitates reliable and low cost transceivers.

Leadframe package with integrated partial waveguide interface

The present disclosure includes systems and methods for sharing bias current. In one embodiment, shared bias current passes through a first level device to one or more second level devices along a bias current path. Multiple active devices may share bias current along a bias current path and process signal along the same or different signal paths. In one embodiment, bias current from one device is split among multiple devices. In another embodiment, bias current is combined from multiple devices into a device. Embodiments may include an interstage circuit along a signal path that improves stability of the circuit.

Circuits and methods for sharing bias current

A millimeter wave integrated waveguide interface package device may comprise: (1) a package comprising a printed wiring board (PWB) and a monolithic microwave integrate circuit (MMIC), wherein the MMIC is in communication with the PWB; and (2) a waveguide interface integrated with the package. The package may be adapted to operate at high frequency and high power, where high frequency includes frequencies greater than about 5 GHz, and high power includes power greater than about 0.5 W.

System and method for integrated waveguide packaging

In an exemplary embodiment, a spurline filter comprises a capacitive element connected to a spur and either a through-line of the spurline filter or ground. In another embodiment, multiple capacitive elements are connected to the spur. In an exemplary embodiment, the capacitively loaded spurline filter provides a band rejection frequency response similar to the band rejection frequency response of a similar spurline filter that does not comprise at least one capacitive element but the capacitively loaded spurline filter has half the layout area or less. In an exemplary embodiment, the spurline filter comprises capacitive elements, where the capacitive elements are configured to reduce the resonant frequency of the filter.

Capacitively loaded spurline filter

A millimeter wave system or package may include at least one printed wiring board (PWB), at least one integrated waveguide interface, and at least one monolithic microwave integrated circuit (MMIC). The package may be assembled in panel form incorporating parallel manufacturing techniques.

An over-molded leadframe (e.g., a Quad Flat No-lead (QFN)) package capable of operating at frequencies in the range of about five gigahertz (GHz) to about 300 GHz and a method of making the over-molded leadframe package are disclosed. The over-molded leadframe package includes a capacitance lead configured to substantially reduce and/or offset the inductance created by one or more wirebonds used to connect an integrated circuit (IC) chip on the package to an input/output (I/O) lead. The IC chip is connected to the capacitance lead via one or more wirebonds, and the capacitance lead is then connected to the I/O lead via at least a second wirebond. Thus, inductance created by the one or more wirebonds on the package is substantially reduced and/or offset by the capacitance lead prior to a signal being output by the package and/or received by the IC chip.

Growing community of inventors

Gilbert, AZ, United States of America

Michael R Lyons