Hewlett Packard Enterprise Development LP

Hewlett-packard Development Company, L.p.

Hewlett-packard Company

Other

International Business Machines Corporation

Compaq Computer Corporation, Inc.

Adaptec, Inc.

Michael R Krause

Melvin K Benedict

Nigel John Edwards

David J Garcia

Fred B Worley

Kevin B Leigh

John Norton

Paul R Culley

Dwight L Barron

Jeffrey R Hilland

Mitchel E Wright

Yoshihiro Ishijima

Renato John Recio

Norman Paul Jouppi

Paolo Faraboschi

Ludovic Emmanuel Paul Noel Jacquin

Sheng Li

Thomas M Laffey

Shiva R Dasari

Viswanath Subramanian

Theofrastos Koulouris

Shankar Iyer

Ramesh VelurEunni

Kimberly K Scott

Gary Belgrave Gostin

Douglas L Voigt

Alan Frederic Benner

Dale Calvin Morris

Patricia Ann Thaler

John C Krause

Martin Goldstein

Joe Perry Cowan

Mallikarjun Chadalapaka

Larry N McMahan

Luis E Luciani

Luis Luciani

A method for securing a plurality of compute nodes includes authenticating a hardware architecture of each of a plurality of components of the compute nodes. The method also includes authenticating a firmware of each of the plurality of components. Further, the method includes generating an authentication database comprising a plurality of authentication descriptions that are based on the authenticated hardware architecture and the authenticated firmware. Additionally, a policy for securing a specified subset of the plurality of compute nodes is implemented by using the authentication database.

Securing node groups

An edge-attachable (EA) optical connector includes an optical connector housing for an optical connector. The optical connector housing includes a slot that aligns with a module board edge finger electrical connector, such that the optical connector housing can be slid over a module board edge finger electrical connector and attached to the module board edge. An optical connector on one end of an optical fiber bundle or ribbon fits within the optical connector housing. When the optical connector housing is attached to the module board edge, the optical connector blind mates with a host optical connector supported by a bracket to which a host electrical connector is attached. An optical connector on another end of the optical fiber bundle or ribbon mates with a module board optical connector. The module board optical connector may include an optical socket mounted on an opto-electronic chip disposed on the module board. The EA optical connector can be easily attached to the module board edge such that it fits around the host electrical connector to allow for optical connectivity in addition to electrical connectivity.

Connector assembly including an edge-attachable optical connector housing and optical connector

A housing-attachable (HA) optical connector is removably attached to a housing that is initially designed for an electrical interface with a base electrical connector on a system board. An optical fiber terminates at one end to a chip optical connector and terminates at another end to the HA optical connector. The HA optical connector is positioned with respect to the housing such that when a portion of the printed circuit board of a removable module extending outside the housing comes into contact with a base electrical connector on a system board, the HA optical connector blind mates with a base-attachable (BA) optical connector on the system board. In this manner, electrical connectivity and optical connectivity are provided between the removable module and the system board.

Connector assembly including a housing-attachable optical connector

A memory management unit receives a transaction request to perform an operation with respect to data in memory, the transaction request including control information. The memory management unit identifies, based on the control information, one of a plurality of versions of a given memory data, where the plurality of versions of the given memory data include a first version of the given memory data and a second version of the given memory data that is modified from the first version. The memory management unit accesses the identified version of the given memory data in response to the transaction request.

Memory data versioning

Thermal control is provided for external light sources for silicon photonics based pluggable modules. In one embodiment, an apparatus comprises a first circuit board; a light source disposed upon the first circuit board; a silicon photonics modulator; a connector comprising a first portion and a second portion, wherein: the first and second portions are physically matable and separable; mating the first and second portions of the connector optically couples the first and second portions, the first portion is disposed upon the first circuit board, and is optically coupled to an output of the light source, and the second portion is optically coupled to an input of the silicon photonics modulator; and a thermal controller to control a temperature of the light source. Some embodiments disable the light source when the connector is separated.

Distribution and control of external light sources for silicon photonics based pluggable modules

A memory controller of a sender node issues an instruction of a trans-fabric instruction set of instructions to a receiver node across a communication fabric that supports memory semantic operations, to cause a given transaction to be performed at the receiver node in response to the issued instruction.

Trans-fabric instruction set for a communication fabric

A control device performs an admissions control process with a first device to determine whether the first device is authorized to communicate over the communication fabric that supports memory semantic operations.

Admissions control of a device

A first receiver device receives, from a sender device in a unicast communication, a data flow including a multicast identifier, the multicast identifier indicating that the data flow is to reach multiple receiver devices. The first receiver device determines that the data flow is to reach multiple receiver devices in response to detecting the multicast identifier. The first receiver device sends, to a second receiver device in a unicast communication, the data flow including the multicast identifier.

Sending a data flow

An example implementation in accordance with an aspect of the present disclosure includes an address translation table of a transparent router. In response to an add service request to add a service to at least a portion of a memory system, a first address to be affected by the service is identified. An affected entry of an address translation table of the transparent router is also identified. The affected entry corresponds to a data path including the first address. The affected entry is modified to cause its corresponding data path to point to a second address associated with the service.

Transparent routers to provide services

According to an example, a memory network includes memory nodes. The memory nodes may each include memory and control logic. The control logic may operate the memory node as a destination for a memory access invoked by a processor connected to the memory network and may operate the memory node as a router to route data or memory access commands to a destination in the memory network.

Memory network with memory nodes controlling memory accesses in the memory network

In some examples, a media controller includes a buffer and controller circuitry. The controller circuitry may receive, from a memory device linked to the media controller, an indication of a number of memory subunits that the memory device is divided into. The controller circuitry may also allocate, within the buffer, a number of logical memory buffers for the memory device greater than the number of memory subunits and indicate to a memory controller that a number of memory units accessible for the memory device is the number of logical memory buffers.

Logical memory buffers for a media controller

A router receives a request including a first memory address from a source node in a first subnet. The router translates the first memory address in the request to a second memory address that is different from the first memory address. The router sends the request including the second memory address to a target node in the second subnet.

Router to send a request from a first subnet to a second subnet

In an example implementation according to aspects of the present disclosure, a memory controller is disclosed. The memory controller is communicatively coupleable to a memory resource having a plurality of memory resource regions, which may be associated with a plurality of computing resources. The memory controller may include a memory resource interface to communicatively couple the memory controller to the memory resource and a computing resource interface to communicatively couple the memory controller to the plurality of computing resources. The memory controller may further include a memory resource memory management unit to manage the memory resource.

Memory controller with memory resource memory management

A requester sends, to a responding component, a request to cause the responding component to perform a computation. The requester sends, to the responding component, a delayed read indication, where the delayed read indication indicates that a result of the computation is not to be returned to the requester from the responding component until a data value at a target address of the delayed read indication has changed. The requester receives, from the responding component, an acknowledgment of the delayed read indication, and after receiving the acknowledgment, receives a response to the request without the requester sending another request to the responding component.

Delayed read indication

Growing community of inventors

Boulder Creek, CA, United States of America

Michael R Krause