Westinghouse Electric Corporation

United States of America As Represented by the Secretary of the Air Force

Northrop Grumman Systems Corporation

Michael R Daniel

John Xavier Przybysz

John H Murphy

John D Adam

Deborah P Partlow

Andrew J Piloto

Steven N Stitzer

Thelma J Isaacs

Robert A Moore

Carol J Painter

A planar phase shifter formed of multiple layers of a ferrite. Selected layers of the ferrite are patterned with a conductor and the multiple layers of magnetic dielectric and conductor are cofired. The phase shifter is fabricated by first obtaining ferrite powder. Then, layers of the ferrite are made, preferably by tape casting. Next the ferrite layers are metallized by applying selected amounts of conductive metals in a selected pattern upon the tape. Selected numbers of vias are placed through selected layers of tape and conductive metal is placed in the vias to provide vertical connections through the layers. The tape layers are then stacked in a predetermined order and are laminated. The laminated stack of layers is then fired to a temperature of approximately 800.degree. C. to 1000.degree. C., sintering the laminated layers into one integrated structure.

Planar phase shifters using low coercive force and fast switching,

Push-pull flux quantum gate array cells synchronously process a pair of polarized data signals. These polarized data signals can be derived from dual polarity data signals by separating the input signals into positive polarity data signals and negative polarity data signals. At least one logic or arithmetic operation is performed on each of the positive and negative polarity signals to produce modified positive and negative polarity signals respectively. These modified positive polarity and negative polarity signals can also be combined to produce a modified dual polarity output data signal. Numerous logic operations can be achieved in gate array cells which perform this signal processing method. By using push-pull flux quantum circuits, the need for auxiliary timing signals or interferometers is minimized.

Superconducting push-pull flux quantum gate array cells

Push-pull flux quantum superconducting digital logic circuits are provided with a circuit branch having a pair of Josephson junctions electrically connected in series with each other. This circuit branch is connected between positive and negative bias voltage supplies which supply a bias current to the Josephson junctions. A dual polarity input voltage signal is applied to a node in the circuit branch and an output signal is extracted from a second node in the circuit branch. Various logic operations can be performed on the input signal by adding additional components and changing the points at which voltage is input to and output from the Josephson junction circuit branch.

Superconducting push-pull flux quantum logic circuits

Superconducting digital logic circuits constructed in accordance with this invention include a circuit branch having first and second Josephson junctions electrically connected in series with each other, with a junction point between the first and second Josephson junctions connected to a neutral point; a positive bias voltage is connected to one end of the circuit branch, and a negative bias voltage is connected to a second end of the circuit branch; a first rail for applying a first input voltage signal, having a first polarity, and for extracting a first output signal is connected to one end of the circuit branch; and a second rail for applying a second input voltage signal, having a second polarity, and for extracting a second output signal is connected to the other end of the circuit branch. This invention encompasses both the above circuit and the method of signal processing performed by such circuits.

Superconducting push-pull flux quantum digital logic circuits

Superconducting timed gate array cells for use in single-rail logic circuits are provided by adding inputs to modified variable threshold logic (MVTL) timed inverter circuits. Data signals which are inphase with a first phase of a power source are coupled to gate array cells in which Josephson junction bias current is provided by a second phase of the power source. NOR, NAND, 2NOR-OR and 2NAND-AND circuits are disclosed for use as building blocks in the production of specialized digital logic circuits.

Superconducting gate array cells

A phased array radar antenna utilizing signal time delay magnetostatic spin wave devices operable to provide feed line transmit time control for variable length transmission feed lines. The preferred embodiment of an improved phased array radar antenna incorporates ferrite devices controlled by d.c. voltage driven ferroelectrics.

Signal time delay magnetostatic spin wave device for phased array

An arrangement for improving the frequency plane delay linearity of a frequency dispersive delay line of the type employing ferrite film materials such as yttrium iron garnet. Linearity improvement involves use of frequency selective transducers located at successively different delay locations in the transmitting and receiving areas of the delay line together with ground plane effects and out of phase signal coupling to the transducer elements including exemplary use of a particular type of microwave transmission line for coupling to the magnetic film.

Magnetostatic delay line with improved delay linearity

The linearity of group delay versus frequency in magnetostatic wave delay lines is improved by a linear variation of one of three discrete parameters in the region between the two delay line transducers. The parameter variation is applied to magnetostatic wave delay lines that have a ground plane, a magnetic garnet crystal film substrate that is spaced from the ground plane and has transmitting and receiving transducers engaged to it, and a magnetic bias field. The discrete parameters varied are the magnetic bias field; the distance of the substrate from the ground plane; and the thickness of the substrate. Appropriate linear variations of any one of the these parameters provides improved linearity of group delay versus frequency.

Magnetostatic wave delay line having improved group delay linearity

An acoustic surface wave device is disclosed which comprises a crystal of Tl.sub.3 VS.sub.4, Tl.sub.3 NbS.sub.4, or mixtures thereof having at least one surface at least 1/2 cm long, a surface wave generating transducer mounted on the surface, and a surface wave receiving transducer mounted on the surface positioned to receive a surface wave generated by the surface wave generating transducer. The device transmits surface waves at a low velocity and high coupling efficiency and can be used in a delay line, a filter, an FM discriminator, an oscillator, or other device.

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Monroeville, PA, United States of America

Michael R Daniel