Motorola Corporation

Michael R Cherniawski

Rickey S Brownson

David A Abercrombie

Vidya S Kaushik

John G Franka

Ronald E Pyle

Gary A DePinto

Joe Steinberg

Jeffrey M Barker

A method of manufacturing a semiconductor component with a multi-level interconnect system includes providing a substrate (11), fabricating a device (12) in the substrate (11), forming an interconnect layer (15) over the substrate (11), depositing a dielectric layer (20) over the interconnect layer (15), depositing a separate interconnect layer (21) over the dielectric layer (20), etching a via (31) in the separate interconnect layer (21) and in the dielectric layer (20), and depositing a different interconnect layer (40) over the separate interconnect layer (21) and in the via (31) wherein the another interconnect layer (40) electrically couples the interconnect layer (15) and the separate interconnect layer (21).

Method for forming a line-on-line multi-level metal interconnect

Semiconductor component with multi-level interconnect system and method

An electrical contact (46) to a phosphorous doped polysilicon gate electrode (18) is formed by preventing arsenic, from a source and drain implant, from doping a portion (22) of the polysilicon gate electrode (18). A photoresist mask (20) covers a portion (22) of the polysilicon gate electrode (18) during the implant, thus preventing it from being doped. An electrical contact (46) is then formed to the masked portion (22) of the polysilicon gate electrode (18).

Method for contacting a semiconductor device

A polysilicon layer may need to have electrical characteristics which are relatively uniform from wafer to wafer. The use of polysilicon as a resistor is one such example. In order to obtain the requisite uniformity, the temperature of the wafers which are receiving the polysilicon must all be the same within a tight tolerance. The reaction takes place in a furnace which takes a long time to reach the requisite temperature tolerance. While the furnace is stabilizing the temperature, oxide, which is an insulator, is growing on the contact locations of the various substrates. To minimize the deleterious oxide formation, a thin layer of polysilicon is deposited at a time significantly prior to the time that the furnace stabilizes which ensures a good, low-resistance contact. The remainder of the polysilicon is then deposited on the thin layer of polysilicon after the temperature has stabilized to obtain the requisite wafer-to-wafer resistance uniformity. The result is consistently low-resistance contacts and wafer-to-wafer uniformity for the resistance of the resistors.

Deposition of a conductive layer for contacts

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Austin, TX, United States of America

Michael R Cherniawski