Microsoft Technology Licensing, LLC

Perkinelmer Informatics, Inc.

Pitney Bowes Inc.

Michael P Wilson

Eric Francis Robinson

Kevin Neal Magill

Michael B Mitchell

Jason Lawrence Panavich

Derek Bachand

Jeffrey F Lowrie

Cliff Didcock

Pierre Morieux

Jean-Hiram Coffy

Keith Coleman Herold

David Notario

Jon Hamaker

Steven Vasquez

Tom Millet

Tom Millett

Steve Kovlakas

Embodiments of the present disclosure include techniques for managing dirty data. An agent receives a request for data. If the data is dirty data, the agent may use a replacement policy to determine if the data should be passed clean or dirty to the requestor. The replacement policy may correspond to how long the dirty data being stored in a cache line is to be maintained. In one embodiment, the replacement policy is a circuit, such as an SRAM and a logic circuit, for example.

Systems and methods for managing dirty data

Described herein are systems, methods, and apparatus for electronically drawing and editing representations of chemical structures using an intuitive user interface. This user interface, the context-aware virtual keyboard, makes it faster and easier to draw and edit chemical structure representations by guiding the user through the sequence of steps required to produce the representation in a context-based, non-linear fashion. The context-based virtual keyboard allows a user to quickly create graphical representations of complex chemical structures by using the structure itself as a basis for presenting efficient options for subsequent drawing/editing steps. Different possible and/or likely actions (e.g., edits to a chemical structure being drawn) are presented to the user based on a selected navigation position on the drawing. Thus, a user can efficiently and intuitively modify a chemical structure drawing without the tedious manual selection of portions of the chemical structure and without searching through complicated menus.

Context-aware virtual keyboard for chemical structure drawing applications

Tracking repeated reads to guide dynamic selection of cache coherence protocols in processor-based devices is disclosed. In this regard, a processor-based device includes processing elements (PEs) and a central ordering point circuit (COP). The COP dynamically selects, on a store-by-store basis, either a write invalidate protocol or a write update protocol as a cache coherence protocol to use for maintaining cache coherency for a memory store operation. The COP's selection is based on protocol preference indicators generated by the PEs using repeat-read indicators that each PE maintains to track whether a coherence granule was repeatedly read by the PE (e.g., as a result of polling reads, or as a result of re-reading the coherence granule after it was evicted from a cache due to an invalidating snoop). After selecting the cache coherence protocol, the COP sends a response message to the PEs indicating the selected cache coherence protocol.

Tracking repeated reads to guide dynamic selection of cache coherence protocols in processor-based devices

Maintaining domain coherence states including Domain State No-Owned (DSN) in processor-based devices is disclosed. In this regard, a processor-based device provides multiple processing elements (PEs) organized into multiple domains, each containing one or more PEs and a local ordering point circuit (LOP). The processor-based device supports domain coherence states for coherence granules cached by the PEs within a given domain. The domain coherence states include a DSN domain coherence state, which indicates that a coherence granule is not cached within a shared modified state within any domain. In some embodiments, upon receiving a request for a read access to a coherence granule, a system ordering point circuit (SOP) determines that the coherence granule is cached in the DSN domain coherence state within a domain of the plurality of domains, and can safely read the coherence granule from the system memory to satisfy the read access if necessary.

Maintaining domain coherence states including domain state no-owned (DSN) in processor-based devices

Providing dynamic selection of cache coherence protocols in processor-based devices is disclosed. In this regard, a processor-based device includes a master PE and at least one snooper PE, as well as a central ordering point (COP). The COP dynamically selects, on a store-by-store basis, either a write invalidate protocol or a write update protocol as a cache coherence protocol to use for maintaining cache coherency for a memory store operation by the master PE. The selection is made by the COP based on one or more protocol preference indicators that may be generated and provided by one or more of the master PE, the at least one snooper PE, and the COP itself. After selecting the cache coherence protocol to use, the COP sends a response message to each of the master PE and the at least one snooper PE indicating the selected cache coherence protocol.

Providing dynamic selection of cache coherence protocols in processor-based devices

Enabling atomic memory accesses across coherence granule boundaries in processor-based devices is disclosed. In this regard, a processor-based device includes multiple processing elements (PEs), and further includes a special-purpose central ordering point (SPCOP) configured to distribute coherence granule ('cogran') pair atomic access (CPAA) tokens. To perform an atomic memory access on a pair of coherence granules, a PE must hold a CPAA token for an address block containing one of the pair of coherence granules before the PE can obtain each of the pair of coherence granules in an exclusive state. Because a CPAA token must be acquired before obtaining exclusive access to at least one of the pair of coherence granules, and because the SPCOP is configured to allow only one CPAA token to be active for a given address block, deadlocks and livelocks between PEs seeking to access the same coherence granules can be avoided.

Enabling atomic memory accesses across coherence granule boundaries in processor-based devices

Techniques to access messaging services for branch offices are described. In one embodiment, for example, an apparatus may include a network interface for a packet-switched network, a private branch exchange for a circuit-switched network, and a gateway to couple to the network interface and the private branch exchange. The gateway may be operative to establish a packet-switched call connection with the network interface and a circuit-switched call connection with the private branch exchange. The gateway may further include a call router to route a call request over a circuit-switched network with the private branch exchange on behalf of a call terminal to access messaging services from a data center with a messaging server when the call terminal and the network interface are unavailable. Other embodiments are described and claimed.

Techniques to access messaging services for branch offices

Textual preview of a voicemail is generated and provided through email or similar media to users along with the audio version. Transcription of the textual version, as well as additional capabilities such as actionable terms, playback-jump, switching between text and audio versions, direct or metadata based searchability, and enhanced response capabilities are provided based on contextual data obtained from voicemail metadata and user associated data stores such as contact list, email history.

Growing community of inventors

Fuquay-Varina, NC, United States of America

Michael P Wilson