Analog Devices,inc.

Michael P Timko

Adrian P Brokaw

Douglas A Mercer

A method and apparatus for measuring and controlling the phase difference or time difference between two signals is presented. In some embodiments two sample and hold (S/H) circuits are arranged as a cooperating system that alternately samples a first signal using the second as a reference. Chopping may be used at the input or output of the S/H circuits. In some embodiments, accurate measurement of digital signal phase differences, such as between two square waves, is obtained without the problems associated with traditional pulse-generation techniques that fail at high frequencies and short pulse lengths.

Differential time sampling circuit

An N-bit DAC converts an N-bit digital word to an analog voltage. An n-bit modified string DAC, including no more than 2,taps, receives as an input, n MSBs of the N-bit digital word and provides the analog voltage as an output. An m-bit interpolating DAC, coupled to the n-bit modified string DAC, receives as an input, m LSBs of the N-bit digital word, and provides an analog output to the string DAC. Preferably, n&equals;m&equals;N/2. In an embodiment, the interpolating DAC includes first and second current DACs, each of which provides current to or from the n-bit modified string DAC, depending on the level of the LSBs.

Resistor string DAC with current mode interpolation

An analog-to-digital (A/D) converter of the successive-approximation type wherein the digital-to-analog converter (DAC) includes a charge-redistribution, binary-weighted switched-capacitor array for producing the analog output for comparison with the analog input signal. A second switched-capacitor DAC is employed to develop error correction signals to be combined with the analog signal from the A/D conversion DAC. The conversion DAC array is connected to one input terminal of the comparator, and the error-correction DAC array is connected to the other comparator input terminal, an arrangement which reduces the number of capacitors required while providing symmetrical capacitance loading of the comparator input circuit.

A/D converter with charge-redistribution DAC and split summation of main

An integrated circuit two terminal temperature transducer providing an accurate current output that is linearly related to absolute temperature over an extended temperature range. The circuit is of the type using first and second transistors having conductive areas of different sizes, and control transistors for supplying equal currents through the first and second transistors to operate them at different current densities, and a resistor responsive to the base-to-emitter voltages of the first and second transistors for developing currents therethrough proportional to absolute temperature. Improved accuracy over an extended temperature range is provided in a two terminal device by means of a third transistor coupled to the first and second transistors to generate another controlled current varying linearly with absolute temperature to be combined with the currents through the first and second transistors to form an output current. Bias currents used by control transistors are directed through the third transistor to compel the bias currents to become components of the controlled current. Similarly, the integrated circuit substrate is connected to direct the substrate leakage current through the third transistor to compel the leakage current to become a component of the output current. Accordingly, bias current and substrate leakage current do not erroneously affect the output current.

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Andover, MA, United States of America

Michael P Timko