Motorola Corporation

Other

Michael P Masquelier

Barbara Vasquez

David N Okada

Michael L Charlier

Scott S Roth

Jin D Kim

Diann M Dow

Michael H Kaneshiro

E James Prendergast

Vida Ilderem Burger

Kevin M Klein

A system () that determines exposure based on local conditions is disclosed. The system can include a sensor () configured to sense local conditions local to a user of the system, a sensor local wireless transmitter () coupled to the sensor, and an electronic device (). The electronic device can include a controller () configured to control operations of the electronic device, a device local wireless transceiver () coupled to the controller and wirelessly coupled to the sensor local wireless transmitter, a network interface coupled () to a wide area network and coupled to the controller, the network interface configured to obtain local environmental conditions, and an exposure module () coupled to the controller. The exposure module can determine exposure to an environmental element based at least on the local conditions sensed by the sensor and the local environmental conditions obtained by the network interface.

Wireless sensor and system that determines exposure to an enviromental element based on local conditions

An apparatus and method is provided for sensing data relating to a structure (), including an inspection site sensor system having at least one microprocessor () coupled to the structure. At least one sensor () for sensing data is connected to each of the at least one microprocessors that compare the data to a standard. A user interface () is coupled to the microprocessor () for presenting the comparison, and a wireless transmitter () is coupled to the microprocessor () for transmitting at least one of the data and the comparison to a management site (). The management site () includes a receiver () for receiving the transmitted at least one of the data and the comparison, a microprocessor () coupled to the receiver (); and a user interface () coupled to the microprocessor ().

Wireless sensing system and method

Insulated gate field effect transistors (10, 70) having process steps for setting the V.sub.T and a device leakage current which are decoupled from the process steps for providing punchthrough protection, thereby lowering a subthreshold swing. In a unilateral transistor (10), a portion (37, 45) of a dopant layer (25, 30) between a source region (48, 51) and a drain region (49, 52) serves as a channel region and sets the V.sub.T and the device leakage current. A halo region (34, 39) contains the source region (48, 51) and sets the punchthrough voltage. In a bilateral transistor (70), both a source region (83, 86) and a drain region (84, 87) are contained within halo regions (75, 74, 79, 81). A portion (76, 82) of a dopant layer (25, 30) sets the V.sub.T and a leakage current, whereas the halo region (75, 79) sets the punchthrough voltage.

Method for fabricating insulated gate field effect transistor having

A method for the fabrication of a trench isolation region (44) includes the deposition of first, second, and third oxidizable layers (28, 34, 42). The first oxidizable layer (28) is deposited to overlie the surface of a trench (12) formed in a semiconductor substrate (10). The first oxidizable layer (28) also fills a recess (26) formed in a masking layer (14), and resides adjacent to the upper surface of the trench (12). After oxidizing the first oxidizable layer (28), a second oxidizable layer (34) is deposited to fill the trench (12). A third oxidizable layer (42) is deposited to overlie the second oxidizable layer (34) and fills a remaining portion of the recess (26). An oxidation process is performed to oxidize oxidizable layer (42) and a portion of second oxidizable layer (34) to form a trench isolation region (44). In an alternative embodiment of the invention, a shallow isolation region (46) is formed in proximity to the trench isolation region ( 44).

Encapsulation method for localized oxidation of silicon with trench

A reduction in defects and lateral encroachment is obtained by utilizing a high pressure oxidation in conjunction with an oxidizable layer conformally deposited over an oxidation mask. The use of high pressure oxidation provides for the formation of LOCOS oxide without the formation of defects. Any native oxide present on the substrate surface is removed by using a ramped temperature deposition process to form oxidizable layer and/or a high temperature anneal is performed to remove the native oxide at the substrate surface. In this embodiment, any oxide which can act as a pipe for oxygen diffusion is removed. Therefore, nominal or no lateral encroachment is exhibited.

High-pressure polysilicon encapsulated localized oxidation of silicon

A method of internally limiting current and providing overvoltage protection in a semiconductor device comprises providing a semiconductor device having at least a first junction wherein both sides of the junction have predetermined dopant concentrations and wherein the first junction is spaced apart a predetermined distance from either a second junction or current blocking means. The predetermined dopant concentrations and distance are such that when a predetermined voltage is applied to the device, a depletion region from the first junction encounters either a depletion region from the second junction or current blocking means, thereby pinching off current at a desired voltage. The pinch-off voltage may be varied by adjusting the distance between the first junction and either the second junction or current blocking means and also by adjusting the predetermined dopant concentrations.

Internal current limit and overvoltage protection method

A method of fabricating a lateral semiconductor structure includes providing a semiconductor substrate and forming wells therein. Following formation of a dielectric layer on the substrate, field region openings are formed through which field regions are implanted into the substrate. The self-aligned formation of field oxidation regions to the field region openings then occurs and is followed by the formation of field plates on the field oxidation regions. A first active device region is then formed in said substrate, the formation of which is self-aligned to the field plates. This is followed by the formation of a second active device region in the first active device region which is also self-aligned to the field plates. The resulting structure allows for high speed devices that maintain consistently high current gain without sacrificing Early or breakdown voltages.

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Mesa, AZ, United States of America

Michael P Masquelier